Datasheet ADE7816 (Analog Devices) - 9

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Data Sheet ADE7816 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS A D L D S C A S H S / / / K S I H S O K L / L C 1 S C S O I C S C C Q C N S M M S H N N RI N 0 9 8 7 6 5 4 3 4 3 3 3 3 3 3 3 23 13 NC 1 30 NC PULL_HIGH 2 29 IRQ0 PULL_LOW 3 28 CLKOUT RESET 4 27 CLKIN DVDD 5 ADE7816 26 VDD DGND 6 TOP VIEW 25 AGND IAP 7 (Not to Scale) 24 AVDD IAN 8 23 IDP IBP 9 22 IEP NC 10 21 NC 11 21 31 4 5 1 1 6 7 1 1 81 91 02 C N P N P T N N P C N B U I I CI C V V F I O I N / NIFER NOTES 1. NC = NO CONNECT. PINS 1, 10, 11, 20, 21, 30, 31, 40 ARE NC PINS THAT MUST BE CONNECTED TO GND. SEE THE LAYOUT GUIDELINES SECTION. 2. NC = NO CONNECT. PIN 33 AND PIN 34 ARE NC PINS THAT MUST BE LEFT FLOATING. SEE THE LAYOUT GUIDELINES SECTION.
6
3. EXPOSED PAD. CREATE A SIMILAR PAD AND CONNECT
00
THE PADS TO AGND AND DGND. SEE THE LAYOUT
0-
GUIDELINES SECTION.
39 10 Figure 6. Pin Configuration
Table 7. Pin Function Descriptions Pin No. Mnemonic Description
1, 10, 11, 20, 21, NC No Connect. These pins must be connected to GND. See the Layout Guidelines section. 30, 31, 40 33, 34 NC No Connect. These pins must be left floating. Do not connect to ground. 2 PULL_HIGH Connect this pin to VDD for proper operation. 3 PULL_LOW Connect this pin to AGND for proper operation. 4 RESETE Active Low Reset Input. Hold this pin low for at least 10 μs to trigger a hardware reset. A 5 DVDD On-Chip 2.5 V Digital LDO Access. Do not connect any external active circuitry to this pin. Decouple this pin with a 4.7 μF capacitor in parallel with a ceramic 220 nF capacitor. 6 DGND Ground Reference. This pin provides the ground reference for the digital circuitry. 7, 8 IAP, IAN Analog Inputs for Current Channel A. This channel is used with the current transducers and is referenced in this data sheet as Current Channel A. Connect these inputs in a single-ended configuration with a maximum signal level of ±0.5 V with respect to IAN. 9, 12 IBP, IBN Analog Inputs for Current Channel B. This channel is used with the current transducers and is referenced in this data sheet as Current Channel B. Connect these inputs in a single-ended configuration with a maximum signal level of ±0.5 V with respect to IBN. 13, 14 ICP, ICN Analog Inputs for Current Channel C. This channel is used with the current transducers and is referenced in this data sheet as Current Channel C. Connect these inputs in a single-ended configuration with a maximum signal level of ±0.5 V with respect to ICN. 15, 16 VP, VN Analog Inputs for the Voltage Channel. This channel is used with the voltage transducer and is referenced as the voltage channel in this data sheet. Connect these inputs in a single-ended configuration with a maximum signal level of ±0.5 V with respect to VN. This channel also has an internal PGA. 17 REFIN/OUT On-Chip Voltage Reference Access. The on-chip reference has a nominal value of 1.2 V. An external reference source with 1.2 V ± 8% can also be connected at this pin. In either case, decouple this pin to AGND with a 4.7 μF capacitor in parallel with a ceramic 100 nF capacitor. 18 IN Analog Input Common Pin for Current Channel D, Current Channel E, and Current Channel F. See the pin descriptions for Pin 19, Pin 22, and Pin 23 for more details. 19 IFP Analog Input for Current Channel F. This channel is used with the current transducers and is referenced in this data sheet as Current Channel F. Connect this input in a single-ended configuration with a maximum signal level of ±0.5 V with respect to IN. 22 IEP Analog Input for Current Channel E. This channel is used with the current transducers and is referenced in this data sheet as Current Channel E. Connect this input in a single-ended configuration with a maximum signal level of ±0.5 V with respect to IN. Rev. B | Page 9 of 48 Document Outline Features General Description Functional Block Diagram Revision History Specifications Timing Characteristics I2C-Compatible Interface Timing SPI Interface Timing HSDC Interface Timing Load Circuit for All Timing Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuit Terminology Quick Start Inputs Power and Ground VDD and AGND, DGND Reference Circuit REFIN/OUT Reset Hardware Reset Software Reset Functionality CLKIN and CLKOUT Analog Inputs Input Pins PGA Gain Digital Integrator Antialiasing Filters Energy Measurements Starting and Stopping the DSP Active Energy Measurement Definition of Active Power and Active Energy Active Energy Registers Active Energy Threshold Energy Accumulation and Register Roll-Over Reactive Energy Measurement Definition of Reactive Power and Reactive Energy Reactive Energy Registers Reactive Energy Threshold Reactive Energy Accumulation and Register Roll-Over Line Cycle Accumulation Mode Root Mean Square Measurement No Load Detection Setting the No Load Thresholds No Load Interrupt Energy Calibration Channel Matching Energy Gain Calibration Energy Offset Calibration Energy Phase Calibration RMS Offset Calibration Power Quality Features Selecting a Current Channel Group Instantaneous Waveforms Zero-Crossing Detection Zero-Crossing Detection Zero-Crossing Timeout Peak Detection Setting the PEAKCYC Register Overcurrent and Overvoltage Detection Setting the OVLVL and OILVL Registers Overvoltage and Overcurrent Interrupts Indication of Power Direction Angle Measurements Period Measurement Voltage Sag Detection Setting the SAGCYC Register Setting the SAGLVL Register Voltage Sag Interrupt Checksum Layout Guidelines Crystal Circuit Outputs Interrupts Communication Serial Interface Selection I2C-Compatible Interface I2C Write Operation I2C Read Operation SPI-Compatible Interface SPI Read Operation SPI Write Operation HSDC Interface Registers Register Protection Register Format Register Maps Register Descriptions Interrupt Enable and Interrupt Status Registers Outline Dimensions Ordering Guide