Datasheet ADE7816 (Analog Devices) - 3

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Data Sheet ADE7816 SPECIFICATIONS
VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 16.384 MHz, TMIN to TMAX = −40°C to +85°C.
Table 1. Parameter1, 2 Min Typ Max Unit Test Conditions/Comments
ACCURACY Active Energy Measurement Active Energy Measurement Error 0.1 % Over a dynamic range of 1000 to 1, PGA = 1, 2, 4; (per Channel) integrator off 0.2 % Over a dynamic range of 3000 to 1, PGA = 1, 2, 4; integrator off 0.1 % Over a dynamic range of 500 to 1, PGA = 8,16; integrator on Phase Error Between Channels Line frequency = 45 Hz to 65 Hz, HPF on Power Factor (PF) = 0.8 Capacitive ±0.05 Degrees Phase lead = 37° PF = 0.5 Inductive ±0.05 Degrees Phase lag = 60° AC Power Supply Rejection VDD = 3.3 V + 120 mV rms/120 Hz, IxP = VP = ±100 mV rms Energy Register Variation 0.01 % DC Power Supply Rejection VDD = 3.3 V ± 330 mV dc Energy Register Variation 0.01 % Total Active Energy Measurement Bandwidth 2 kHz REACTIVE ENERGY MEASUREMENT Reactive Energy Measurement Error 0.1 % Over a dynamic range of 1000 to 1, PGA = 1, 2, 4; (per Channel) integrator off 0.2 % Over a dynamic range of 3000 to 1, PGA = 1, 2, 4; integrator off 0.1 % Over a dynamic range of 500 to 1, PGA = 8,16; integrator on Phase Error Between Channels Line frequency = 45 Hz to 65 Hz, HPF on PF = 0.8 Capacitive ±0.05 Degrees Phase lead = 37° PF = 0.5 Inductive ±0.05 Degrees Phase lag = 60° AC Power Supply Rejection VDD = 3.3 V + 120 mV rms/120 Hz, IxP = VP = ±100 mV rms Energy Register Variation 0.01 % DC Power Supply Rejection VDD = 3.3 V ± 330 mV dc Energy Register Variation 0.01 % Total Reactive Energy Measurement Bandwidth 2 kHz RMS MEASUREMENTS IRMS and VRMS Measurement Bandwidth 2 kHz IRMS and VRMS Measurement Error 0.1 % Over a dynamic range of 500 to 1; one second of averaging (100 samples) ANALOG INPUTS Maximum Signal Levels ±500 mV peak Single-ended inputs between the following pins: IAP and IAN, IBP and IBN, ICP and ICN, IDP and IN, IEP and IN, IFP and IN. Input Impedance (DC) IAP, IAN, IBP, IBN, ICP, ICN, IDP, IEP, and IFP Pins 400 kΩ IN Pin 130 kΩ ADC Offset Error ±2 mV PGA = 1, uncalibrated error, see the Terminology section Gain Error ±4 % External 1.2 V reference Rev. B | Page 3 of 48 Document Outline Features General Description Functional Block Diagram Revision History Specifications Timing Characteristics I2C-Compatible Interface Timing SPI Interface Timing HSDC Interface Timing Load Circuit for All Timing Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuit Terminology Quick Start Inputs Power and Ground VDD and AGND, DGND Reference Circuit REFIN/OUT Reset Hardware Reset Software Reset Functionality CLKIN and CLKOUT Analog Inputs Input Pins PGA Gain Digital Integrator Antialiasing Filters Energy Measurements Starting and Stopping the DSP Active Energy Measurement Definition of Active Power and Active Energy Active Energy Registers Active Energy Threshold Energy Accumulation and Register Roll-Over Reactive Energy Measurement Definition of Reactive Power and Reactive Energy Reactive Energy Registers Reactive Energy Threshold Reactive Energy Accumulation and Register Roll-Over Line Cycle Accumulation Mode Root Mean Square Measurement No Load Detection Setting the No Load Thresholds No Load Interrupt Energy Calibration Channel Matching Energy Gain Calibration Energy Offset Calibration Energy Phase Calibration RMS Offset Calibration Power Quality Features Selecting a Current Channel Group Instantaneous Waveforms Zero-Crossing Detection Zero-Crossing Detection Zero-Crossing Timeout Peak Detection Setting the PEAKCYC Register Overcurrent and Overvoltage Detection Setting the OVLVL and OILVL Registers Overvoltage and Overcurrent Interrupts Indication of Power Direction Angle Measurements Period Measurement Voltage Sag Detection Setting the SAGCYC Register Setting the SAGLVL Register Voltage Sag Interrupt Checksum Layout Guidelines Crystal Circuit Outputs Interrupts Communication Serial Interface Selection I2C-Compatible Interface I2C Write Operation I2C Read Operation SPI-Compatible Interface SPI Read Operation SPI Write Operation HSDC Interface Registers Register Protection Register Format Register Maps Register Descriptions Interrupt Enable and Interrupt Status Registers Outline Dimensions Ordering Guide