Datasheet FDV303N (ON Semiconductor)

link to page 2 Digital FET, N-Channel FDV303N
General Description
These N−Channel enhancement mode field effect transistors are produced using ON Semiconductor’s proprietary, high cell density, DMOS technology. This very high density process is tailored to minimize on−state resistance at low gate drive conditions. This device
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is designed especially for application in battery circuits using either one lithium or three cadmium or NMH cells. It can be used as an inverter or for high−efficiency miniature discrete DC/DC conversion in compact portable electronic devices like cellular phones and pagers. This device has excellent on−state resistance even at gate drive voltages as low as 2.5 V.
SOT−23 (TO−236) Features CASE 318−08 STYLE 21
• 25 V, 0.68 A Continuous, 2 A Peak ♦ RDS(ON) = 0.45 Ω @ VGS = 4.5 V
MARKING DIAGRAM
♦ RDS(ON) = 0.6 Ω @ VGS= 2.7 V Drain • Very Low Level Gate Drive Requirements Allowing Direct Operation 3 in 3 V Circuits, V A303M GS(th) < 1 V G • Gate−Source Zener for ESD Ruggedness, > 6 kV Human Body G Model 1 2 Gate Source • Compact Industry Standard SOT−23 Surface Mount Package Aor blank = One/two character Loacation Code • This Device is Pb−Free, Halogen Free/BFR Free and is RoHS 303 = Specific Device Code Compliant M = Date Code G = Pb−Free Package (Note: Microdot may be in either location) * Location code can be blank or with characters indicating manufacturing location * Date Code orientation and overbar may vary depending upon manufacturing location.
PIN ASSIGNMENT
D G S SOT−23
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 1997
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Publication Order Number:
March, 2020 − Rev. 5 FDV303N/D