Datasheet HMC8205BCHIPS (Analog Devices) - 6

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HMC8205BCHIPS Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTION 2 VDD2 RFOUT 3 1 RFIN VGG1 4 VDD1 5
002 13790- Figure 2. Pad Configuration
Table 7. Pad Function Descriptions Pad No. Mnemonic Description
1 RFIN RF Input (RFIN). This pin is ac-coupled and internally matched to 50 Ω. See Figure 4 for the RFIN interface schematic. 2 VDD2 Drain Bias for Second Stage of Amplifier. See Figure 3 for the VDD2 interface schematic. 3 RFOUT RF Output (RFOUT). This pin is ac-coupled and internally matched to 50 Ω. See Figure 7 for the RFOUT interface schematic. 4 VGG1 Gate Control for Second Stage of Amplifier. See Figure 6 for the VGG1 interface schematic. 5 VDD1 Drain Bias for First Stage of Amplifier. See Figure 5 for the VDD1 interface schematic. Die Bottom GND Ground. Die bottom must be connected to RF and dc ground. See Figure 8 interface schematic.
INTERFACE SCHEMATICS VDD2
003 13790- 006
VGG1
13790- Figure 3. VDD2 Interface Figure 6. VGG1 Interface 004 007
RFIN
13790-
RFOUT
13790- Figure 4. RFIN Interface Figure 7. RFOUT Interface
VDD1 GND
008 13790- 005 13790- Figure 5. VDD1 Interface Figure 8. GND Interface Rev. A | Page 6 of 19 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTION INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION RECOMMENDED BIAS SEQUENCING MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICS Handling Precautions TYPICAL APPLICATION CIRCUIT ASSEMBLY DIAGRAM OUTLINE DIMENSIONS ORDERING GUIDE