Datasheet ADE7816 (Analog Devices) - 7

HerstellerAnalog Devices
BeschreibungSix Current, One voltage Channel Energy Metering IC
Seiten / Seite48 / 7 — Data Sheet. ADE7816. HSDC Interface Timing. Table 4. HSDC Interface …
RevisionB
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DokumentenspracheEnglisch

Data Sheet. ADE7816. HSDC Interface Timing. Table 4. HSDC Interface Timing Parameter Parameter. Symbol. Min. Max. Unit. HSA. tSS. tSFS. HSCLK

Data Sheet ADE7816 HSDC Interface Timing Table 4 HSDC Interface Timing Parameter Parameter Symbol Min Max Unit HSA tSS tSFS HSCLK

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Data Sheet ADE7816 HSDC Interface Timing Table 4. HSDC Interface Timing Parameter Parameter Symbol Min Max Unit
HSA to HSCLK Edge tSS 0 ns HSCLK Period 125 ns HSCLK Low Pulse Width tSL 50 ns HSCLK High Pulse Width tSH 50 ns Data Output Valid After HSCLK Edge tDAV 40 ns Data Output Fall Time tDF 20 ns Data Output Rise Time tDR 20 ns HSCLK Rise Time tSR 10 ns HSCLK Fall Time tSF 10 ns HSD Disable After HSA Rising Edge tDIS 5 ns HSA High After HSCLK Edge tSFS 0 ns
HSA tSS tSFS HSCLK tSL tSH t t t SF SR DAV tDIS MSB INTERMEDIATE BITS LSB HSD
004
tDF tDR
10390- Figure 4. HSDC Interface Timing
Load Circuit for All Timing Specifications 2mA IOL TO OUTPUT 1.6V PIN CL 50pF 800µA IOH
005 10390- Figure 5. Load Circuit for All Timing Specifications Rev. B | Page 7 of 48 Document Outline Features General Description Functional Block Diagram Revision History Specifications Timing Characteristics I2C-Compatible Interface Timing SPI Interface Timing HSDC Interface Timing Load Circuit for All Timing Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Test Circuit Terminology Quick Start Inputs Power and Ground VDD and AGND, DGND Reference Circuit REFIN/OUT Reset Hardware Reset Software Reset Functionality CLKIN and CLKOUT Analog Inputs Input Pins PGA Gain Digital Integrator Antialiasing Filters Energy Measurements Starting and Stopping the DSP Active Energy Measurement Definition of Active Power and Active Energy Active Energy Registers Active Energy Threshold Energy Accumulation and Register Roll-Over Reactive Energy Measurement Definition of Reactive Power and Reactive Energy Reactive Energy Registers Reactive Energy Threshold Reactive Energy Accumulation and Register Roll-Over Line Cycle Accumulation Mode Root Mean Square Measurement No Load Detection Setting the No Load Thresholds No Load Interrupt Energy Calibration Channel Matching Energy Gain Calibration Energy Offset Calibration Energy Phase Calibration RMS Offset Calibration Power Quality Features Selecting a Current Channel Group Instantaneous Waveforms Zero-Crossing Detection Zero-Crossing Detection Zero-Crossing Timeout Peak Detection Setting the PEAKCYC Register Overcurrent and Overvoltage Detection Setting the OVLVL and OILVL Registers Overvoltage and Overcurrent Interrupts Indication of Power Direction Angle Measurements Period Measurement Voltage Sag Detection Setting the SAGCYC Register Setting the SAGLVL Register Voltage Sag Interrupt Checksum Layout Guidelines Crystal Circuit Outputs Interrupts Communication Serial Interface Selection I2C-Compatible Interface I2C Write Operation I2C Read Operation SPI-Compatible Interface SPI Read Operation SPI Write Operation HSDC Interface Registers Register Protection Register Format Register Maps Register Descriptions Interrupt Enable and Interrupt Status Registers Outline Dimensions Ordering Guide