Datasheet SID1181KQ SCALE-iDriver (Power Integrations) - 7

HerstellerPower Integrations
BeschreibungUp to 8 A Single Channel 600 V / 650 V / 750 V IGBT/MOSFET Gate Drivers for Automotive Applications Providing Reinforced Galvanic Isolation
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SID1181KQ. Example. Power Dissipation and IC Junction. Temperature Estimation

SID1181KQ Example Power Dissipation and IC Junction Temperature Estimation

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SID1181KQ
To avoid parasitic power-switch-conduction during system power-on, During IC operation, the P power is shared between turn-on (R ), DRV GH the gate is connected to COM through 22 kW resistor. turn-off (R ) external gate resistors and internal driver resistances GL Figure 13 shows how switch desaturation can be measured using R and R . For junction temperature estimation purposes, the GHI GLI resistors R – R . In this example all the resistors have a value dissipated power under load (P ) inside the IC can be calculated OL VCE2 VCE11 of 100 kW using 1206 package. The total resistance is 1 MW. The accordingly to equation 4: resistors should be chosen to limit current to between 0.6 mA to 0.8 mA at maximum DC-link voltage. The sum of R – R should RGHI RGHL VCE2 VCE11 P b l OL = . 0 5 # QGATE # fS # V # + be approximately 500 kW for 600 V semiconductors. In each case TOT RGHI + RGH RGHL + RGL the resistor string must provide sufficient creepage and clearance distances between col ector of the semiconductor and SCALE-iDriver. (4) The low leakage diode D keeps the short-circuit duration constant CL over a wide DC-link voltage range. R and R represent sum of external (R , R ) and power GH GL GON GOFF semiconductor internal gate resistance (R ): Response time is set up through R and C (typical y 120 kW). If GINT VCE RES short-circuit detection proves to be too sensitive, the C value can RES be increased. The maximum short-circuit duration must be limited to RGH = R GON + RGINT the maximum value given in the semiconductor data sheet. RGL = RGOFF + RGINT Figure 14 il ustrates how diodes D and D may be used to VCE1 VCE2 measure switch desaturation. For insulation, two diodes in SMD Total IC power dissipation (P ) is estimated as sum of equations 2, 3 packages are used (STTH212U for example). R connected to VISO DIS RES and 4: guarantees current flow through the diodes when the semiconductor is in the on-state. When the switch desaturates, C starts to be = + + RES PDIS PP PSNL POL (5) charged through R . In this configuration the response time is RES control ed by R and C . In this application example C = 33 pF RES RES RES The operating junction temperature (T ) for given ambient and R = 62 kW; if desaturation is too sensitive or the short-circuit J RES temperature (T ) can be estimated according to equation 6: duration too long, both C and R can be adjusted. A RES RES It is important to ensure that PCB traces do not cover the area below the desaturation resistors or diodes D and D . This is a critical TJ = iJA # PDIS + TA (6) VCE1 VCE2 design requirement to avoid coupling capacitance with the SCALE- iDriver’s VCE pin and isolation issues within the PCB.
Example
Gate resistors are located physical y close to the power semiconductor switch. As these components can get hot, it is recommended that An example is given below, they are placed away from the SCALE-iDriver. ƒ = 20 kHz, T = 85 °C, V = 25 V, V = 5 V. S A TOT VCC
Power Dissipation and IC Junction
Q = 2.5 µC (the gate charge value here should correspond to GATE
Temperature Estimation
selected V ), R = 2.5 W, R = R = 1.8 W. TOT GINT GON GOFF First calculation in designing the power semiconductor switch gate P = 2.5 µC × 20 kHz × 25 V = 1.25 W, according to equation 1. DRV driver stage is to calculate the required gate power - P . The power P = 5 V × 13.5 mA = 67 mW, according to equation 2 (see Figure 16). DRV P is calculated based on equation 1: P = 25 V × 7.5 mA = 185 mW, according to equation 3 (see Figure 17). SNL The dissipated power under load is: PDRV = QGATE # fS # VTOT (1) POL = 0.5 # . 2 5 C n # 20 kHz # 25 V # Where, . 1 45 X . 1 2 X b + l ≅ . 1 45 X + . 4 3 X . 1 2 X + . 0.3 , W 4 3 X Q – Control ed power semiconductor switch gate charge (derived GATE for the particular gate potential range defined by V ). See TOT semiconductor manufacturer data sheet. according to equation 4. R = 1.45 W as maximum data sheet value. ƒ – Switching frequency which is same as applied to the IN pin of GHI S SCALE-iDriver. R = 1.2 W as maximum data sheet value. GHL R = R = 1.8 W + 2.5 W = 4.3 W. GH GL V – SCALE-iDriver secondary-side supply voltage. TOT P = 67 mW + 185 mW + 300 mW = 552 mW according to equation 5. DIS In addition to P , P (primary-side IC power dissipation) and P T = 67 °C/W × 552 mW + 85 °C = 122 °C according to equation 6. DRV P SNL J (secondary-side IC power dissipation without capacitive load) must be Estimated junction temperature for this design would be approximately considered. Both are ambient temperature and switching frequency 122 °C and is lower than the recommended maximum value. As the dependent (see typical performance characteristics). gate charge is not adjusted to selected V and internal IC resistor TOT values are maximum values, it is understood that the example P (2) P = VVCC # IVCC represents worst-case conditions. P (3) SNL = VTOT # IVISO
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Rev. B 09/19 www.power.com Document Outline Product Highlights Description Product Portfolio Pin Functional Description SCALE-iDriver Functional Description Application Examples and Components Selection Power Dissipation and IC Junction Temperature Estimation Absolute Maximum Ratings Thermal Resistance Key Electrical Characteristics Typical Performance Characteristics eSOP-R16B Package Drawing MSL Table ESD and Latch-Up Table IEC 60664-1 Rating Table Electrical Characteristics (EMI) Table Regulatory Information Table Part Ordering Information