Datasheet AD7783 (Analog Devices) - 6

HerstellerAnalog Devices
BeschreibungRead-Only, Pin-Configured, 24-bit Sigma-Delta ADC with Excitation Current Sources
Seiten / Seite13 / 6 — AD7783. CS (I). DOUT/RDY (O). MSB. LSB. SLAVE MODE. SCLK (I). t10. MASTER …
RevisionC
Dateiformat / GrößePDF / 321 Kb
DokumentenspracheEnglisch

AD7783. CS (I). DOUT/RDY (O). MSB. LSB. SLAVE MODE. SCLK (I). t10. MASTER MODE. SCLK (O)

AD7783 CS (I) DOUT/RDY (O) MSB LSB SLAVE MODE SCLK (I) t10 MASTER MODE SCLK (O)

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AD7783 CS (I) t2 t t 8 t7 3 DOUT/RDY (O) MSB LSB MSB LSB t4 t9 t6 SLAVE MODE SCLK (I) t5 t4 t10 MASTER MODE t6 SCLK (O) t5 I = INPUT TO AD7783, AND O = OUTPUT FROM AD7783. SLAVE MODE IS SELECTED BY TYING THE MODE PIN +,*+, WHILE MASTER MODE IS SELECTED BY TYING THE MODE PIN /2:.
Figure 2. Slave/Master Mode Timing Diagram
ABSOLUTE MAXIMUM RATINGS*
TSSOP Package (TA = 25∞C, unless otherwise noted.) ␪JA Thermal Impedance . 97.9∞C/W VDD to GND . –0.3 V to +7 V ␪JC Thermal Impedance . 14∞C/W Analog Input Voltage to GND . –0.3 V to VDD + 0.3 V Lead Temperature, Soldering Reference Input Voltage to GND . –0.3 V to VDD + 0.3 V Vapor Phase (60 sec) . 215∞C Total AIN/REFIN Current (Indefinite) . 30 mA Infrared (15 sec) . 220∞C Digital Input Voltage to GND . –0.3 V to VDD + 0.3 V *Stresses above those listed under Absolute Maximum Ratings may cause per- Digital Output Voltage to GND . –0.3 V to VDD + 0.3 V manent damage to the device. This is a stress rating only; functional operation of Operating Temperature Range . –40∞C to +85∞C the device at these or any other conditions above those listed in the operational Storage Temperature Range . –65∞C to +150∞C sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Junction Temperature . 150∞C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7783 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. C –5– Document Outline FEATURES INTERFACE POWER ON-CHIP FUNCTIONS APPLICATIONS FUNCTIONAL BLOCK DIAGRAM BASIC CONNECTION DIAGRAM GENERAL DESCRIPTION SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS Typical Performance Characteristics ADC CIRCUIT INFORMATION Overview NOISE PERFORMANCE DIGITAL INTERFACE MASTER MODE (MODE = 0) SLAVE MODE (MODE = 1) CIRCUIT DESCRIPTION Analog Input Channel Programmable Gain Amplifier Bipolar Configuration/Output Coding Excitation Currents Crystal Oscillator Reference Input Grounding and Layout OUTLINE DIMENSIONS Revision History