Datasheet AD7783 (Analog Devices) - 10

AD7783
to the voltage on the AIN(–) input. For example, if AIN(–) is Deriving the reference input voltage across an external resistor 2.5 V and the AD7783 is configured for an analog input range will mean that the reference input sees a significant external of ± 160 mV, the analog input range on the AIN(+) input is source impedance. External decoupling on the REFIN pins 2.34 V to 2.66 V (i.e., 2.5 V ± 0.16 V). would not be recommended in this type of circuit configuration. The coding is offset binary with a negative full-scale voltage
Grounding and Layout
resulting in a code of 000 . 000, a zero differential voltage Since the analog inputs and reference inputs on the ADC are resulting in a code of 100 . 000, and a positive full-scale differential, most of the voltages in the analog modulator are voltage resulting in a code of 111 . 111. The output code for common-mode voltages. The excellent common-mode rejection any analog input voltage can be represented as follows: of the part will remove common-mode noise on these inputs. The digital filter will provide rejection of broadband noise on Code N = - 2 1 ¥ AIN ( ¥ GAIN / (1 024 . ¥V ) + [ ]1 REF the power supply, except at integer multiples of the modulator sampling frequency. The digital filter also removes noise from where AIN is the analog input voltage, GAIN is the PGA gain, the analog and reference inputs, provided these noise sources do i.e., 1 on the ± 2.56 V range and 16 on the ± 160 mV range, not saturate the analog modulator. As a result, the AD7783 is and N = 24. more immune to noise interference than a conventional high
Excitation Currents
resolution converter. However, because the resolution of the The AD7783 also contains two matched 200 mA constant cur- AD7783 is so high, and the noise levels from the AD7783 are so rent sources. Both source current from VDD that is directed to low, care must be taken with regard to grounding and layout. either the IOUT1 or IOUT2 pins of the device depending on The printed circuit board that houses the AD7783 should be the polarity of the IPIN pin. These current sources can be used designed such that the analog and digital sections are separated to excite external resistive bridge or RTD sensors. and confined to certain areas of the board. A minimum etch
Crystal Oscillator
technique is generally best for ground planes as it gives the best The AD7783 is intended for use with a 32.768 kHz watch crys- shielding. tal. A PLL internally locks onto a multiple of this frequency to It is recommended that the AD7783’s GND pin be tied to the provide a stable 4.194304 MHz clock for the ADC. The modu- AGND plane of the system. In any layout, it is important that lator sample rate is the same as the crystal oscillator frequency. the user keep in mind the flow of currents in the system, ensur- The start-up time associated with 32.768 kHz crystals is typically ing that the return paths for all currents are as close as possible 300 ms. In some cases, it will be necessary to connect capacitors to the paths the currents took to reach their destinations. Avoid on the crystal to ensure that it does not oscillate at overtones of forcing digital currents to flow through the AGND sections of its fundamental operating frequency. The values of capacitors will the layout. vary depending on the manufacturer’s specifications. The AD7783’s ground plane should be allowed to run under
Reference Input
the AD7783 to prevent noise coupling. The power supply lines The AD7783 has a fully differential reference input capability to the AD7783 should use as wide a trace as possible to provide for the channel. The common-mode range for differential inputs low impedance paths and reduce the effects of glitches on the is from GND to VDD. The reference input is unbuffered, and power supply line. Fast switching signals like clocks should be therefore excessive R-C source impedances will introduce gain shielded with digital ground to avoid radiating noise to other errors. The reference voltage REFIN (REFIN(+) – REFIN(–)) sections of the board, and clock signals should never be run is 2.5 V nominal for specified operation, but the AD7783 is near the analog inputs. Avoid crossover of digital and analog functional with reference voltages from 1 V to VDD. In applica- signals. Traces on opposite sides of the board should run at tions where the excitation (voltage or current) for the transducer right angles to each other. This will reduce the effects of on the analog input also drives the reference voltage for the part, feedthrough through the board. A microstrip technique is by far the effect of the low frequency noise in the excitation source will the best but is not always possible with a double-sided board. In be removed as the application is ratiometric. If the AD7783 is this technique, the component side of the board is dedicated to used in a nonratiometric application, a low noise reference should ground planes while signals are placed on the solder side. be used. Recommended reference voltage sources for the AD7783 Good decoupling is important when using high resolution ADCs. include the AD780, REF43, and REF192. It should also be noted V that the reference inputs provide a high impedance, dynamic load. DD should be decoupled with 10 mF tantalum in parallel with 0.1 mF capacitors to GND. To achieve the best from these Because the input impedance of each reference input is dynamic, decoupling components, they have to be placed as close as pos- resistor/capacitor combinations on these inputs can cause dc gain sible to the device, ideally right up against the device. All errors, depending on the output impedance of the source that is logic chips should be decoupled with 0.1 mF ceramic capaci- driving the reference inputs. Recommended reference voltage tors to DGND. sources (e.g., AD780) will typically have low output impedances and are, therefore, tolerant to having decoupling capacitors on the REFIN(+) without introducing gain errors in the system. REV. C –9– Document Outline FEATURES INTERFACE POWER ON-CHIP FUNCTIONS APPLICATIONS FUNCTIONAL BLOCK DIAGRAM BASIC CONNECTION DIAGRAM GENERAL DESCRIPTION SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN CONFIGURATION PIN FUNCTION DESCRIPTIONS Typical Performance Characteristics ADC CIRCUIT INFORMATION Overview NOISE PERFORMANCE DIGITAL INTERFACE MASTER MODE (MODE = 0) SLAVE MODE (MODE = 1) CIRCUIT DESCRIPTION Analog Input Channel Programmable Gain Amplifier Bipolar Configuration/Output Coding Excitation Currents Crystal Oscillator Reference Input Grounding and Layout OUTLINE DIMENSIONS Revision History