Datasheet AD7452 (Analog Devices)

Differential Input, 555 kSPS 12-Bit ADC in an 8-Lead SOT-23 Data Sheet AD7452 FEATURES FUNCTIONAL BLOCK DIAGRAM Specified for VDD of 3 V and 5 V VDD Low power at max throughput rate 3.3 mW max at 555 kSPS with 3 V supplies 7.25 mW max at 555 kSPS with 5 V supplies Fully differential analog input VIN+ 12-BIT Wide input bandwidth T/H SUCCESSIVE VIN– APPROXIMATION 70 dB SINAD at 100 kHz input frequency ADC Flexible power/serial clock speed management VREF No pipeline delays High speed serial interface SPI/QSPI™/MICROWIRE™/DSP compatible SCLK Power-down mode: 1 μA max SDATA AD7452 CONTROL LOGIC 8-lead SOT-23 package CS APPLICATIONS
-001
Transducer interface
03154-A
Battery-powered systems GND Data acquisition systems
Figure 1.
Portable instrumentation Motor control
The SAR architecture of this part ensures that there are no pipeline delays.
GENERAL DESCRIPTION
The AD7452 uses advanced design techniques to achieve very The AD74521 is a 12-bit, high speed, low power, successive low power dissipation. approximation (SAR) analog-to-digital converter that features a
PRODUCT HIGHLIGHTS
fully differential analog input. This part operates from a single 1. Operation with Either 3 V or 5 V Power Supplies. 3 V or 5 V power supply and features throughput rates up to 2. High Throughput with Low Power Consumption. With a 555 kSPS. 3 V supply, the AD7452 offers 3.3 mW max power The part contains a low noise, wide bandwidth, differential consumption for 555 kSPS throughput. track-and-hold amplifier (T/H) that can handle input 3. Fully Differential Analog Input. frequencies up to 3.5 MHz. The reference voltage is applied 4. Flexible Power/Serial Clock Speed Management. The externally to the V conversion rate is determined by the serial clock, allowing REF pin and can be varied from 100 mV to 3.5 V depending on the power supply and what suits the the power to be reduced as the conversion time is reduced application. The value of the reference voltage determines the through the serial clock speed increase. This part also common-mode voltage range of the part. With this truly features a shutdown mode to maximize power efficiency at differential input structure and variable reference input, the lower throughput rates. user can select a variety of input ranges and bias points. 5. Variable Voltage Reference Input. 6. No Pipeline Delay. The conversion process and data acquisition are controlled 7. Accurate Control of the Sampling Instant via a CS Input using CS and the serial clock, allowing the device to interface and Once-Off Conversion Control. with microprocessors or DSPs. The input signals are sampled 8. ENOB > 8 Bits Typically with 100 mV Reference. on the falling edge of CS, and the conversion is also initiated at this point. 1 Protected by U.S. Patent Number 6,681,332.
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT Analog Input Structure DRIVING DIFFERENTIAL INPUTS Differential Amplifier Op Amp Pair RF Transformer DIGITAL INPUTS REFERENCE Example 1 Example 2 SINGLE-ENDED OPERATION SERIAL INTERFACE Timing Example MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME POWER vs. THROUGHPUT RATE APPLICATION HINTS Grounding and Layout EVALUATING THE AD7452’S PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE