Datasheet AD7176-2 (Analog Devices) - 3

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AD7176-2 Data Sheet TABLE OF CONTENTS
Features .. 1 Delay .. 44 Applications ... 1 16-Bit/24-Bit Conversions... 44 General Description ... 1 Serial Interface Reset (Dout_Reset) ... 44 Functional Block Diagram .. 1 Synchronization (SYNC/ERROR) ... 44 Revision History ... 3 Error Flags ... 45 Specifications ... 4 DATA_STAT ... 45 Timing Characteristics .. 7 IOSTRENTGH ... 45 Timing Diagrams .. 7 Grounding and Layout .. 46 Absolute Maximum Ratings .. 8 Register Summary .. 47 Thermal Resistance .. 8 Register Details ... 49 ESD Caution .. 8 Communications Register ... 49 Pin Configuration and Function Descriptions ... 9 Status Register ... 50 Typical Performance Characteristics ... 11 ADC Mode Register ... 51 Noise Performance and Resolution .. 17 Interface Mode Register .. 52 Getting Started .. 18 Register Check .. 53 Power Supplies .. 19 Data Register ... 53 Digital Communication ... 19 GPIO Configuration Register ... 54 Configuration Overview ... 21 ID Register... 55 Circuit Description ... 26 Channel Map Register 0 .. 56 Analog Input ... 26 Channel Map Register 1 .. 57 Driver Amplifiers ... 26 Channel Map Register 2 .. 58 AD7176-2 Reference ... 29 Channel Map Register 3 .. 59 AD7176-2 Clock Source ... 30 Setup Configuration Register 0 .. 60 Digital Filters ... 31 Setup Configuration Register 1 .. 60 Sinc5 + Sinc1 Filter... 31 Setup Configuration Register 2 .. 61 Sinc3 Filter ... 32 Setup Configuration Register 3 .. 61 Single Cycle Settling ... 32 Filter Configuration Register 0 ... 62 Enhanced 50 Hz and 60 Hz Rejection Filters ... 34 Filter Configuration Register 1 ... 63 Operating Modes .. 37 Filter Configuration Register 2 ... 64 Continuous Conversion Mode ... 37 Filter Configuration Register 3 ... 65 Continuous Read Mode ... 38 Offset Register 0 ... 66 Single Conversion Mode ... 39 Offset Register 1 ... 66 Standby and Power-Down Modes .. 40 Offset Register 2 ... 66 Calibration Modes .. 40 Offset Register 3 ... 66 Digital Interface .. 41 Gain Register 0.. 67 Checksum Protection... 41 Gain Register 1.. 67 CRC Calculation ... 42 Gain Register 2.. 67 Integrated Functions .. 44 Gain Register 3.. 67 General-Purpose I/O ... 44 Outline Dimensions ... 68 External Multiplexer Control .. 44 Ordering Guide .. 68 Rev. D | Page 2 of 68 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS NOISE PERFORMANCE AND RESOLUTION GETTING STARTED POWER SUPPLIES DIGITAL COMMUNICATION Accessing the ADC Register Map AD7176-2 RESET CONFIGURATION OVERVIEW Channel Configuration Channel Registers ADC Setups Setup Configuration Registers Filter Configuration Registers Offset Registers Gain Registers ADC Mode and Interface Mode Configuration ADC Mode Register Interface Mode Register Understanding Configuration Flexibility CIRCUIT DESCRIPTION ANALOG INPUT Fully Differential Inputs Pseudo Differential Inputs DRIVER AMPLIFIERS AD8475 AD8656 ADA4940-1/ADA4940-2 AD7176-2 REFERENCE External Reference Internal Reference AD7176-2 CLOCK SOURCE Internal Oscillator External Crystal External Clock DIGITAL FILTERS SINC5 + SINC1 FILTER SINC3 FILTER SINGLE CYCLE SETTLING ENHANCED 50 HZ AND 60 HZ REJECTION FILTERS OPERATING MODES CONTINUOUS CONVERSION MODE CONTINUOUS READ MODE SINGLE CONVERSION MODE STANDBY AND POWER-DOWN MODES CALIBRATION MODES DIGITAL INTERFACE CHECKSUM PROTECTION CRC CALCULATION Polynomial Example of a Polynomial CRC Calculation—24-Bit Word: 0x654321 (Eight Command Bits and 16-Bit Data) XOR Calculation Example of an XOR Calculation—24-Bit Word: 0x654321 (Eight Command Bits and 16-Bit Data) INTEGRATED FUNCTIONS GENERAL-PURPOSE I/O EXTERNAL MULTIPLEXER CONTROL DELAY 16-BIT/24-BIT CONVERSIONS SERIAL INTERFACE RESET (DOUT_RESET) SYNCHRONIZATION (SYNC\/ERROR\) ERROR FLAGS ADC_ERROR CRC_ERROR REG_ERROR Pin DATA_STAT IOSTRENTGH GROUNDING AND LAYOUT REGISTER SUMMARY REGISTER DETAILS COMMUNICATIONS REGISTER STATUS REGISTER ADC MODE REGISTER INTERFACE MODE REGISTER REGISTER CHECK DATA REGISTER GPIO CONFIGURATION REGISTER ID REGISTER CHANNEL MAP REGISTER 0 CHANNEL MAP REGISTER 1 CHANNEL MAP REGISTER 2 CHANNEL MAP REGISTER 3 SETUP CONFIGURATION REGISTER 0 SETUP CONFIGURATION REGISTER 1 SETUP CONFIGURATION REGISTER 2 SETUP CONFIGURATION REGISTER 3 FILTER CONFIGURATION REGISTER 0 FILTER CONFIGURATION REGISTER 1 FILTER CONFIGURATION REGISTER 2 FILTER CONFIGURATION REGISTER 3 OFFSET REGISTER 0 OFFSET REGISTER 1 OFFSET REGISTER 2 OFFSET REGISTER 3 GAIN REGISTER 0 GAIN REGISTER 1 GAIN REGISTER 2 GAIN REGISTER 3 OUTLINE DIMENSIONS ORDERING GUIDE