Datasheet LT3959 (Analog Devices) - 8
| Hersteller | Analog Devices |
| Beschreibung | Wide Input Voltage Range Boost/SEPIC/Inverting Converter with 6A, 40V Switch |
| Seiten / Seite | 26 / 8 — block DiagraM (QFN Package). Figure 1. LT3959 Block Diagram Working as a … |
| Dateiformat / Größe | PDF / 341 Kb |
| Dokumentensprache | Englisch |
block DiagraM (QFN Package). Figure 1. LT3959 Block Diagram Working as a SEPIC Converter (Shown for QFN Package)
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LT3959
block DiagraM (QFN Package)
L1 CDC D1 V • V IN OUT R4 R3 CIN SGND L2 R2 COUT • FBX R1 SGND 25 27 28 EN/UVLO VIN DRIVE A10 I + S1 2.5V 2.2µA – 1.22V I 2.5V BANDGAP S3 REFERENCE I CURRENT CURRENT S2 INTERNAL BIAS BG LIMIT LIMIT VC 10µA GENERATOR 30 Q3 BG_LOW VIN LDO DRIVE LDO C INTERNAL BIAS C2 UVLO INTVCC CVCC G4 36 RC OTP A8 CC1 + 1.2V 1.72V – A11 TSD – ~165˚C + SGND 8, 9, 20, 21 SGND G6 SR1 A12 V SW C – – DRIVER G2 M1 +A7 G5 R Q –0.86V + S 1.6V + Q2 PWM A1 COMPARATOR – 45mV – FBX A6 FBX 31 + + VIN A2 –0.8V – SLOPE V + ISENSE A5 RPG – PGOOD RAMP RSENSE 35 Q4 G8 A15 + 2.7V GND 13, 14 – RAMP 15, 16 1.52V – A13 GENERATOR 17 + G7 – 1.25V A14 100kHz ~ 1MHz – +A3 G1 OSCILLATOR –0.76V + FREQ 1.25V + FREQUENCY FOLDBACK + FOLDBACK A4 Q1 – FREQ PROG SS SYNC RT SGND 4, 24 GNDK 32 34 33 12 3759 F01 CSS RT
Figure 1. LT3959 Block Diagram Working as a SEPIC Converter (Shown for QFN Package)
3959fa 8 For more information www.linear.com/LT3959 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts
block DiagraM (QFN Package)
L1 CDC D1 V • V IN OUT R4 R3 CIN SGND L2 R2 COUT • FBX R1 SGND 25 27 28 EN/UVLO VIN DRIVE A10 I + S1 2.5V 2.2µA – 1.22V I 2.5V BANDGAP S3 REFERENCE I CURRENT CURRENT S2 INTERNAL BIAS BG LIMIT LIMIT VC 10µA GENERATOR 30 Q3 BG_LOW VIN LDO DRIVE LDO C INTERNAL BIAS C2 UVLO INTVCC CVCC G4 36 RC OTP A8 CC1 + 1.2V 1.72V – A11 TSD – ~165˚C + SGND 8, 9, 20, 21 SGND G6 SR1 A12 V SW C – – DRIVER G2 M1 +A7 G5 R Q –0.86V + S 1.6V + Q2 PWM A1 COMPARATOR – 45mV – FBX A6 FBX 31 + + VIN A2 –0.8V – SLOPE V + ISENSE A5 RPG – PGOOD RAMP RSENSE 35 Q4 G8 A15 + 2.7V GND 13, 14 – RAMP 15, 16 1.52V – A13 GENERATOR 17 + G7 – 1.25V A14 100kHz ~ 1MHz – +A3 G1 OSCILLATOR –0.76V + FREQ 1.25V + FREQUENCY FOLDBACK + FOLDBACK A4 Q1 – FREQ PROG SS SYNC RT SGND 4, 24 GNDK 32 34 33 12 3759 F01 CSS RT
Figure 1. LT3959 Block Diagram Working as a SEPIC Converter (Shown for QFN Package)
3959fa 8 For more information www.linear.com/LT3959 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Applications Information Typical Applications Package Description Revision History Related Parts