Datasheet LTC2259-16 (Analog Devices) - 8
| Hersteller | Analog Devices |
| Beschreibung | 16-Bit, 80Msps Ultralow Power 1.8V ADC |
| Seiten / Seite | 30 / 8 — TIMING DIAGRAMS. Double-Data Rate LVDS Output Mode Timing. All Outputs … |
| Dateiformat / Größe | PDF / 371 Kb |
| Dokumentensprache | Englisch |
TIMING DIAGRAMS. Double-Data Rate LVDS Output Mode Timing. All Outputs Are Differential and Have LVDS Levels
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LTC2259-16
TIMING DIAGRAMS Double-Data Rate LVDS Output Mode Timing All Outputs Are Differential and Have LVDS Levels
tAP N + 2 N + 4 ANALOG N INPUT N + 3 tH N + 1 tL ENC– ENC+ tD tD D0_1+ D0N-5 D1N-5 D0N-4 D1N-4 D0N-3 D1N-3 D0N-2 D1N-2 D0_1– ••• D14_15+ D14N-5 D15N-5 D14N-4 D15N-4 D14N-3 D15N-3 D14N-2 D15N-2 D14_15– tC tC CLKOUT+ CLKOUT– 225916 TD03
SPI Port Timing (Readback Mode)
tS tDS tDH tSCK tH CS SCK tDO SDI R/W A6 A5 A4 A3 A2 A1 A0 XX XX XX XX XX XX XX XX SDO D7 D6 D5 D4 D3 D2 D1 D0 HIGH IMPEDANCE
SPI Port Timing (Write Mode)
CS SCK SDI R/W A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 SDO 226114 TD04 HIGH IMPEDANCE 225916fa 8
TIMING DIAGRAMS Double-Data Rate LVDS Output Mode Timing All Outputs Are Differential and Have LVDS Levels
tAP N + 2 N + 4 ANALOG N INPUT N + 3 tH N + 1 tL ENC– ENC+ tD tD D0_1+ D0N-5 D1N-5 D0N-4 D1N-4 D0N-3 D1N-3 D0N-2 D1N-2 D0_1– ••• D14_15+ D14N-5 D15N-5 D14N-4 D15N-4 D14N-3 D15N-3 D14N-2 D15N-2 D14_15– tC tC CLKOUT+ CLKOUT– 225916 TD03
SPI Port Timing (Readback Mode)
tS tDS tDH tSCK tH CS SCK tDO SDI R/W A6 A5 A4 A3 A2 A1 A0 XX XX XX XX XX XX XX XX SDO D7 D6 D5 D4 D3 D2 D1 D0 HIGH IMPEDANCE
SPI Port Timing (Write Mode)
CS SCK SDI R/W A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 SDO 226114 TD04 HIGH IMPEDANCE 225916fa 8