Datasheet LTC2259-16 (Analog Devices)
| Hersteller | Analog Devices |
| Beschreibung | 16-Bit, 80Msps Ultralow Power 1.8V ADC |
| Seiten / Seite | 30 / 1 — FEATURES. DESCRIPTION. APPLICATIONS. TYPICAL APPLICATION. 2-Tone FFT, fIN … |
| Dateiformat / Größe | PDF / 371 Kb |
| Dokumentensprache | Englisch |
FEATURES. DESCRIPTION. APPLICATIONS. TYPICAL APPLICATION. 2-Tone FFT, fIN = 70MHz and 75MHz
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LTC2259-16 16-Bit, 80Msps Ultralow Power 1.8V ADC
FEATURES DESCRIPTION
n 73.1dB SNR The LTC®2259-16 is a sampling 16-bit A/D converter de- n 88dB SFDR signed for digitizing high frequency, wide dynamic range n Low Power: 89mW signals. It is perfect for demanding communications ap- n Single 1.8V Supply plications with AC performance that includes 73.1dB SNR n CMOS, DDR CMOS or DDR LVDS Outputs and 88dB spurious free dynamic range (SFDR). Ultralow n Selectable Input Ranges: 1VP-P to 2VP-P jitter of 0.17psRMS allows undersampling of IF frequencies n 800MHz Full-Power Bandwidth S/H with excellent noise performance. n Optional Data Output Randomizer DC specs include ±4LSB INL (typical) and ±0.5LSB DNL n Optional Clock Duty Cycle Stabilizer (typical). n Shutdown and Nap Modes n Serial SPI Port for Confi guration The digital outputs can be either full-rate CMOS, double- n 40-Pin (6mm × 6mm) QFN Package data rate CMOS, or double-data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.
APPLICATIONS
The ENC+ and ENC– inputs may be driven differentially or n Communications single ended with a sine wave, PECL, LVDS, TTL or CMOS n Cellular Base Stations inputs. An optional clock duty cycle stabilizer allows high n Software Defi ned Radios performance at full speed for a wide range of clock duty n Portable Medical Imaging cycles. n Multi-Channel Data Acquisition L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear n Nondestructive Testing Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
1.8V 1.2V
2-Tone FFT, fIN = 70MHz and 75MHz
V TO 1.8V DD 0 OVDD –10 –20 + D15 16-BIT • CMOS –30 ANALOG INPUT CORRECTION OUTPUT PIPELINED • OR –40 INPUT S/H LOGIC DRIVERS ADC CORE • LVDS – –50 D0 –60 –70 OGND AMPLITUDE (dBFS) –80 CLOCK/DUTY –90 CYCLE –100 CONTROL –110 225916 TA01a GND –120 80MHz 0 10 20 30 40 CLOCK FREQUENCY (MHz) 225916 TA01b 225916fa 1
FEATURES DESCRIPTION
n 73.1dB SNR The LTC®2259-16 is a sampling 16-bit A/D converter de- n 88dB SFDR signed for digitizing high frequency, wide dynamic range n Low Power: 89mW signals. It is perfect for demanding communications ap- n Single 1.8V Supply plications with AC performance that includes 73.1dB SNR n CMOS, DDR CMOS or DDR LVDS Outputs and 88dB spurious free dynamic range (SFDR). Ultralow n Selectable Input Ranges: 1VP-P to 2VP-P jitter of 0.17psRMS allows undersampling of IF frequencies n 800MHz Full-Power Bandwidth S/H with excellent noise performance. n Optional Data Output Randomizer DC specs include ±4LSB INL (typical) and ±0.5LSB DNL n Optional Clock Duty Cycle Stabilizer (typical). n Shutdown and Nap Modes n Serial SPI Port for Confi guration The digital outputs can be either full-rate CMOS, double- n 40-Pin (6mm × 6mm) QFN Package data rate CMOS, or double-data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.
APPLICATIONS
The ENC+ and ENC– inputs may be driven differentially or n Communications single ended with a sine wave, PECL, LVDS, TTL or CMOS n Cellular Base Stations inputs. An optional clock duty cycle stabilizer allows high n Software Defi ned Radios performance at full speed for a wide range of clock duty n Portable Medical Imaging cycles. n Multi-Channel Data Acquisition L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear n Nondestructive Testing Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
1.8V 1.2V
2-Tone FFT, fIN = 70MHz and 75MHz
V TO 1.8V DD 0 OVDD –10 –20 + D15 16-BIT • CMOS –30 ANALOG INPUT CORRECTION OUTPUT PIPELINED • OR –40 INPUT S/H LOGIC DRIVERS ADC CORE • LVDS – –50 D0 –60 –70 OGND AMPLITUDE (dBFS) –80 CLOCK/DUTY –90 CYCLE –100 CONTROL –110 225916 TA01a GND –120 80MHz 0 10 20 30 40 CLOCK FREQUENCY (MHz) 225916 TA01b 225916fa 1