Datasheet LTC2259-16 (Analog Devices) - 3

LTC2259-16
ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC2259CUJ-16#PBF LTC2259CUJ-16#TRPBF LTC2259UJ-16 40-Lead (6mm × 6mm) Plastic QFN 0°C to 70°C LTC2259IUJ-16#PBF LTC2259IUJ-16#TRPBF LTC2259UJ-16 40-Lead (6mm × 6mm) Plastic QFN –40°C to 85°C Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based fi nish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear.com/tapeandreel/
CONVERTER CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. (Note 5) PARAMETER CONDITIONS MIN TYP MAX UNITS
Resolution (No Missing Codes) l 16 Bits Integral Linearity Error Differential Analog Input (Note 6) l –12 ±4 12 LSB Differential Linearity Error Differential Analog Input l –1 ±0.5 1.2 LSB Offset Error (Note 7) l –9 ±1.5 9 mV Gain Error Internal Reference ±1.5 %FS External Reference l –1.5 ±0.4 1.5 %FS Offset Drift ±20 μV/°C Full-Scale Drift Internal Reference ±30 ppm/°C External Reference ±10 ppm/°C Transition Noise External Reference 5 LSBRMS
ANALOG INPUT The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V + – IN Analog Input Range (AIN – AIN ) 1.7V < VDD < 1.9V l 1 to 2 VP-P V + – INCM Analog Input Common Mode (AIN + AIN )/2 Differential Analog Input (Note 8) l VCM – 100mV VCM VCM + 100mV V VSENSE External Voltage Reference Applied to SENSE External Reference Mode l 0.625 1.250 1.300 V IINCM Analog Input Common Mode Current Per Pin, 80Msps 100 μA I + – IN1 Analog Input Leakage Current 0 < AIN , AIN < VDD, No Encode l –1 1 μA IIN2 PAR/SER Input Leakage Current 0 < PAR/SER < VDD l –3 3 μA IIN3 SENSE Input Leakage Current 0.625 < SENSE < 1.3V l –6 6 μA tAP Sample-and-Hold Acquisition Delay Time 0 ns tJITTER Sample-and-Hold Acquisition Delay Jitter 0.17 psRMS CMRR Analog Input Common Mode Rejection Ratio 80 dB BW-3B Full-Power Bandwidth Figure 6 Test Circuit 800 MHz
DYNAMIC ACCURACY The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. AIN = –1dBFS. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
SNR Signal-to-Noise Ratio 5MHz Input 73.1 dBFS 70MHz Input l 70.9 72.9 dBFS 140MHz Input 72.4 dBFS 225916fa 3