AN822 Vishay Siliconix PowerPAK ® 1212 Mounting and Thermal ConsiderationsJohnson Zhao MOSFETs for switching applications are now available The PowerPAK 1212-8 has a footprint area compara- with die on resistances around 1 mΩ and with the ble to TSOP-6. It is over 40 % smaller than standard capability to handle 85 A. While these die capabilities TSSOP-8. Its die capacity is more than twice the size represent a major advance over what was available of the standard TSOP-6’s. It has thermal performance just a few years ago, it is important for power MOSFET an order of magnitude better than the SO-8, and 20 packaging technology to keep pace. It should be obvi- times better than TSSOP-8. Its thermal performance is ous that degradation of a high performance die by the better than all current SMT packages in the market. It package is undesirable. PowerPAK is a new package will take the advantage of any PC board heat sink technology that addresses these issues. The PowerPAK capability. Bringing the junction temperature down also 1212-8 provides ultra-low thermal impedance in a increases the die efficiency by around 20 % compared small package that is ideal for space-constrained with TSSOP-8. For applications where bigger pack- applications. In this application note, the PowerPAK ages are typically required solely for thermal consider- 1212-8’s construction is described. Following this, ation, the PowerPAK 1212-8 is a good option. mounting information is presented. Finally, thermal and electrical performance is discussed. Both the single and dual PowerPAK 1212-8 utilize the same pin-outs as the single and dual PowerPAK SO-8. THE PowerPAK PACKAGE The low 1.05 mm PowerPAK height profile makes both versions an excellent choice for applications with The PowerPAK 1212-8 package (Figure 1) is a deriva- space constraints. tive of PowerPAK SO-8. It utilizes the same packaging technology, maximizing the die area. The bottom of the PowerPAK 1212 SINGLE MOUNTING die attach pad is exposed to provide a direct, low resis- tance thermal path to the substrate the device is To take the advantage of the single PowerPAK 1212-8’s mounted on. The PowerPAK 1212-8 thus translates thermal performance see Application Note 826, the benefits of the PowerPAK SO-8 into a smaller Recommended Minimum Pad Patterns With Outline package, with the same level of thermal performance. Drawing Access for Vishay Siliconix MOSFETs. Click (Please refer to application note “PowerPAK SO-8 on the PowerPAK 1212-8 single in the index of this Mounting and Thermal Considerations.”) document. In this figure, the drain land pattern is given to make full contact to the drain pad on the PowerPAK package. This land pattern can be extended to the left, right, and top of the drawn pattern. This extension will serve to increase the heat dissipation by decreasing the ther- mal resistance from the foot of the PowerPAK to the PC board and therefore to the ambient. Note that increasing the drain land area beyond a certain point will yield little decrease in foot-to-board and foot-to- ambient thermal resistance. Under specific conditions of board configuration, copper weight, and layer stack, experiments have found that adding copper beyond an area of about 0.3 to 0.5 in2 of will yield little improve- ment in thermal performance. Figure 1. PowerPAK 1212 Devices Document Number 71681 www.vishay.com 03-Mar-06 1