Datasheet ADA4940-2 (Analog Devices) - 10

ADA4940-1/ADA4940-2 Data Sheet 1 E 1 ABL B1 S1 S1 N1 UT I F S + – –V –V DI –O 24 23 22 21 20 19 –IN1 1 18 +OUT1 +FB1 2 17 VOCM1 +V 3 S1 16 –V ADA4940-2 S2 +V 4 S1 15 –VS2 –FB2 5 14 DISABLE2 +IN2 6 13 –OUT2 7 8 9 1 10 1 12 2 N2 B2 S2 S2 T2 –I F CM + +V +V OV OU+ NOTES
102
1. CONNECT THE EXPOSED PAD TO –V
08452-
S OR GROUND.
Figure 6. ADA4940-2 Pin Configuration (24-Lead LFCSP)
Table 13. ADA4940-2 Pin Function Descriptions (24-Lead LFCSP) Pin No. Mnemonic Description
1 −IN1 Negative Input Summing Node 1. 2 +FB1 Positive Output Feedback Pin 1. 3, 4 +VS1 Positive Supply Voltage 1. 5 −FB2 Negative Output Feedback Pin 2. 6 +IN2 Positive Input Summing Node 2. 7 −IN2 Negative Input Summing Node 2. 8 +FB2 Positive Output Feedback Pin 2. 9, 10 +VS2 Positive Supply Voltage 2. 11 VOCM2 Output Common-Mode Voltage 2. 12 +OUT2 Positive Output 2. 13 −OUT2 Negative Output 2. 14 DISABLE2 Disable Pin 2. 15, 16 −VS2 Negative Supply Voltage 2. 17 VOCM1 Output Common-Mode Voltage 1. 18 +OUT1 Positive Output 1. 19 −OUT1 Negative Output 1. 20 DISABLE1 Disable Pin 1. 21, 22 −VS1 Negative Supply Voltage 1. 23 −FB1 Negative Output Feedback Pin 1. 24 +IN1 Positive Input Summing Node 1. Exposed paddle (EPAD) Connect the exposed pad to −VS or ground. Rev. C | Page 10 of 32 Document Outline Features Applications General Description Functional Block Diagrams Revision History Specifications VS = 5 V +DIN or –DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance VS = 3 V +DIN or –DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Definition of Terms Differential Voltage Common-Mode Voltage (CMV) Common-Mode Offset Voltage Differential VOS, Differential CMRR, and VOCM CMRR Balance Theory of Operation Applications Information Analyzing an Application Circuit Setting the Closed-Loop Gain Estimating the Output Noise Voltage Impact of Mismatches in the Feedback Networks Calculating the Input Impedance of an Application Circuit Terminating a Single-Ended Input Input Common-Mode Voltage Range Input and Output Capacitive AC Coupling Setting the Output Common-Mode Voltage DISABLE Pin Driving a Capacitive Load Driving a High Precision ADC Layout, Grounding, and Bypassing ADA4940-1 LFCSP Example Outline Dimensions Ordering Guide