Datasheet ADA4940-2 (Analog Devices) - 3

Data Sheet ADA4940-1/ADA4940-2 REVISION HISTORY 9/13—Rev. B to Rev. C
Changes to Calculating the Input Impedance of an Application Updated Outline Dimensions .. 30 Circuit Section ... 23 Changes to Ordering Guide ... 31 Changes to Figure 71 .. 25 Changes to Driving a High Precision ADC Section
3/12—Rev. A to Rev. B
and Figure 73 ... 26 Reorganized Layout ... Universal Changed ADA4940-1 Example Section to ADA4940-1 LFCSP Added ADA4940-1 8-Lead SOIC Package ... Universal Example Section .. 27 Changes to Features Section, Table 1, and Figure 1; Replaced Changes to Ordering Guide ... 29 Figure 2 ... 1 Changed V
12/11—Rev. 0 to Rev. A
S = ±2 V(or +5 V) Section to VS = +5 V Section .. 3 Changes to Features Section, General Description Changes to V Section, Table 1 .. 1 S = +5 V Section and Table 3 .. 3 Changes to Table 4 and Table 5 ... 4 Replaced Figure 1 and Figure 2 ... 1 Changes to V Changes to VS = ±2.5 V (or +5 V) Section and Table 3 ... 3 S = 3 V Section and Table 6 ... 5 Changes to Table 7 and Table 8 ... 6 Changes to Table 6 .. 5 Added Figure 5 and Table 12, Renumbered Sequentially .. 9 Replaced Figure 7, Figure 8, Figure 9, and Figure 10 ... 9 Changes to Figure 7, Figure 8, and Figure 9 .. 10 Replaced Figure 14, Figure 15, and Figure 17 ... 10 Added Figure 15 and Figure 18; Changes to Figure 13, Replaced Figure 24 and Figure 27 ... 12 Figure 14, and Figure 16 ... 11 Changes to Figure 37 .. 14 Changes to Figure 19 and Figure 20 ... 12 Replaced Figure 43 and Figure 46 ... 15 Changes to Figure 25, Figure 26, and Figure 27; Added Replaced Figure 53 .. 18 Figure 28, Figure 29, and Figure 30 .. 13 Changes to Estimating the Output Noise Voltage Section, Table Changes to Figure 31, Figure 32, Figure 33, Figure 34, Figure 35, 14, Table 15, and Calculating the Input Impedance of an and Figure 36 ... 14 Application Circuit Section ... 21 Changes to Figure 37, Figure38, Figure 39, and Figure 41 .. 15 Changes to Input Common-Mode Voltage Range Section ... 22 Changes to Figure 49, Figure 50, and Figure 51 .. 17 Changes to Driving a High Precision ADC Section and Added Figure 55 and Figure 57 ... 18 Figure 65 ... 24 Changes to Differential VOS, Differential CMRR, and VOCM
10/11—Revision 0: Initial Version
CMRR Section ... 20 Rev. C | Page 3 of 32 Document Outline Features Applications General Description Functional Block Diagrams Revision History Specifications VS = 5 V +DIN or –DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance VS = 3 V +DIN or –DIN to VOUT, dm Performance VOCM to VOUT, cm Performance General Performance Absolute Maximum Ratings Thermal Resistance Maximum Power Dissipation ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Test Circuits Terminology Definition of Terms Differential Voltage Common-Mode Voltage (CMV) Common-Mode Offset Voltage Differential VOS, Differential CMRR, and VOCM CMRR Balance Theory of Operation Applications Information Analyzing an Application Circuit Setting the Closed-Loop Gain Estimating the Output Noise Voltage Impact of Mismatches in the Feedback Networks Calculating the Input Impedance of an Application Circuit Terminating a Single-Ended Input Input Common-Mode Voltage Range Input and Output Capacitive AC Coupling Setting the Output Common-Mode Voltage DISABLE Pin Driving a Capacitive Load Driving a High Precision ADC Layout, Grounding, and Bypassing ADA4940-1 LFCSP Example Outline Dimensions Ordering Guide