Datasheet NTD4815NH (ON Semiconductor) - 5
| Hersteller | ON Semiconductor |
| Beschreibung | Power MOSFET 30 V, 35 A, Single N-Channel, DPAK/IPAK |
| Seiten / Seite | 8 / 5 — NTD4815NH. TYPICAL PERFORMANCE CURVES. Figure 7. Capacitance Variation. … |
| Dateiformat / Größe | PDF / 297 Kb |
| Dokumentensprache | Englisch |
NTD4815NH. TYPICAL PERFORMANCE CURVES. Figure 7. Capacitance Variation. Figure 8. Gate- To- Source and Drain- To- Source
Textversion des Dokuments
NTD4815NH TYPICAL PERFORMANCE CURVES
V 1200 15 25DS V S) GS = 0 V TJ = 25°C T ,D 1000 R C (VOL iss 12 Q 20 A T IN (pF) - 800 TAGE T VDS VGS O NCE 9 15 - A VOL SOURCE 600 CIT A 6 Q 10 1 Q2 CAP 400 OURCE C VOL C, oss -S T 200 -TO 3 I 5 D = 30 A A E GE TJ = 25°C Crss AT ( 0 0 V 0 OL 0 5 10 15 20 25 30 ,G 0 2 4 6 8 10 12 14 16 18 20 T DRAIN- TO- SOURCE VOLTAGE (VOLTS) GSV Q S G, TOTAL GATE CHARGE (nC) )
Figure 7. Capacitance Variation Figure 8. Gate- To- Source and Drain- To- Source Voltage vs. Total Charge
100 35 VDD = 15 V VGS = 0 V ID = 30 A 30 T V J = 25°C GS = 11.5 V (AMPS) t 25 d(off) (ns) tr 20 10 CURRENT TIME 15 t, td(on) 10 OURCE t ,S f I S 5 1 0 1 10 100 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 RG, GATE RESISTANCE (OHMS) VSD, SOURCE- TO- DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Figure 10. Diode Forward Voltage vs. Current Variation vs. Gate Resistance
1000 40 ID = 15.4 A 35 (AMPS) 100 -SOURCE (mJ) 30 10 ms -TO 25 10 100 ms DRAIN 20 CURRENT V ENERGY GS = 20 V SINGLE PULSE 1 ms 15 T 10 ms C = 25°C PULSE ,DRAIN 1 dc LANCHE 10 I D RDS(on) LIMIT THERMAL LIMIT AVA 5 PACKAGE LIMIT SINGLE 0.1 0 0.1 1 10 100 25 50 75 100 125 150 175 EAS, VDS, DRAIN- TO- SOURCE VOLTAGE (VOLTS) TJ, JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased Figure 12. Maximum Avalanche Energy vs. Safe Operating Area Starting Junction Temperature http://onsemi.com 5
V 1200 15 25DS V S) GS = 0 V TJ = 25°C T ,D 1000 R C (VOL iss 12 Q 20 A T IN (pF) - 800 TAGE T VDS VGS O NCE 9 15 - A VOL SOURCE 600 CIT A 6 Q 10 1 Q2 CAP 400 OURCE C VOL C, oss -S T 200 -TO 3 I 5 D = 30 A A E GE TJ = 25°C Crss AT ( 0 0 V 0 OL 0 5 10 15 20 25 30 ,G 0 2 4 6 8 10 12 14 16 18 20 T DRAIN- TO- SOURCE VOLTAGE (VOLTS) GSV Q S G, TOTAL GATE CHARGE (nC) )
Figure 7. Capacitance Variation Figure 8. Gate- To- Source and Drain- To- Source Voltage vs. Total Charge
100 35 VDD = 15 V VGS = 0 V ID = 30 A 30 T V J = 25°C GS = 11.5 V (AMPS) t 25 d(off) (ns) tr 20 10 CURRENT TIME 15 t, td(on) 10 OURCE t ,S f I S 5 1 0 1 10 100 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 RG, GATE RESISTANCE (OHMS) VSD, SOURCE- TO- DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time Figure 10. Diode Forward Voltage vs. Current Variation vs. Gate Resistance
1000 40 ID = 15.4 A 35 (AMPS) 100 -SOURCE (mJ) 30 10 ms -TO 25 10 100 ms DRAIN 20 CURRENT V ENERGY GS = 20 V SINGLE PULSE 1 ms 15 T 10 ms C = 25°C PULSE ,DRAIN 1 dc LANCHE 10 I D RDS(on) LIMIT THERMAL LIMIT AVA 5 PACKAGE LIMIT SINGLE 0.1 0 0.1 1 10 100 25 50 75 100 125 150 175 EAS, VDS, DRAIN- TO- SOURCE VOLTAGE (VOLTS) TJ, JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased Figure 12. Maximum Avalanche Energy vs. Safe Operating Area Starting Junction Temperature http://onsemi.com 5