Datasheet AD8428 (Analog Devices) - 10
| Hersteller | Analog Devices |
| Beschreibung | Low Noise, Low Gain Drift, G = 2000 Instrumentation Amplifier |
| Seiten / Seite | 20 / 10 — AD8428. Data Sheet. 100. +VS. –40°C. +25°C. +85°C. +125°C. –0.4. ) E. … |
| Revision | A |
| Dateiformat / Größe | PDF / 363 Kb |
| Dokumentensprache | Englisch |
AD8428. Data Sheet. 100. +VS. –40°C. +25°C. +85°C. +125°C. –0.4. ) E. –0.8. V G. ( A. –SR. –1.2. ING. S Y VO. E ( T. PPL. +SR. AG U +2.0. L S. O O. +1.6. V T
Modelllinie für dieses Datenblatt
Textversion des Dokuments
AD8428 Data Sheet 100 +VS –40°C +25°C +85°C +125°C 90 –0.4 S 80 ) E –0.8 V G ( A –SR T 70 L –1.2 s) ING µ W V/ 60 S Y VO E E ( T PPL A 50 +SR AG U +2.0 T R L S O O EW 40 +1.6 V T SL UT 30 ED P R +1.2 UT ER 20 O +0.8 EF R 10 +0.4 0
3
–VS
26
–40 –25 –10 5 20 35 50 65 80 95 110 125
02
4
0
5 6 7 8 9 10 11 12 13 14 15 16 17
1- 1-
TEMPERATURE (°C)
73 73 09
SUPPLY VOLTAGE (±VS)
09 Figure 21. Slew Rate vs. Temperature, VS = ±15 V Figure 24. Output Voltage Swing vs. Supply Voltage, RL = 10 kΩ
100 +VS –40°C +25°C +85°C +125°C 90 –0.4 S 80 ) E –0.8 V G ( AT 70 L –1.2 s) ING µ –SR W V/ 60 S Y VO E E ( T PPL A 50 AG U +2.0 T R L S O O EW 40 +SR +1.6 V T SL UT 30 ED P R +1.2 UT ER 20 O +0.8 EF R 10 +0.4 0
4
–VS
27
–40 –25 –10 5 20 35 50 65 80 95 110 125
02
4
0
5 6 7 8 9 10 11 12 13 14 15 16 17
1- 1-
TEMPERATURE (°C)
73 73 09
SUPPLY VOLTAGE (±VS)
09 Figure 22. Slew Rate vs. Temperature, VS = ±5 V Figure 25. Output Voltage Swing vs. Supply Voltage, RL = 2 kΩ
+VS 15 –40°C –0.5 +25°C –40°C S +25°C –1.0 +85°C E 10 +85°C G +125°C ) A –1.5 +125°C T (V L G V) –2.0 IN 5 E ( W G Y VO –2.5 S A E T G L PPLU A 0 VO S LT T O +2.5 O T PU +2.0 T V IN ED U –5 R +1.5 TP ER U O EF +1.0 R –10 +0.5 –VS
5
–15 4 6 8 10 12 14 16 18
28 02
100 1k 10k 100k
0 1- 1-
SUPPLY VOLTAGE (±V
73 73
S) LOAD RESISTANCE (Ω)
09 09 Figure 23. Input Voltage Limit vs. Supply Voltage Figure 26. Output Voltage Swing vs. Load Resistance, VS = ±15 V Rev. A | Page 10 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE FILTER TERMINALS REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies and Grounding Reference Pin INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION IMAX Input Voltages Beyond the Rails Large Differential Input Voltage at High Gain RADIO FREQUENCY INTERFERENCE (RFI) CALCULATING THE NOISE OF THE INPUT STAGE Source Resistance Noise Voltage Noise of the Instrumentation Amplifier Current Noise of the Instrumentation Amplifier Total Noise Density Calculation APPLICATIONS INFORMATION EFFECT OF PASSIVE NETWORK ACROSS THE FILTER TERMINALS CIRCUITS USING THE FILTER TERMINALS Setting the Amplifier to Different Gains Low-Pass Filter Notch Filter Extracting the Common-Mode Voltage of the Input OUTLINE DIMENSIONS ORDERING GUIDE
3
–VS
26
–40 –25 –10 5 20 35 50 65 80 95 110 125
02
4
0
5 6 7 8 9 10 11 12 13 14 15 16 17
1- 1-
TEMPERATURE (°C)
73 73 09
SUPPLY VOLTAGE (±VS)
09 Figure 21. Slew Rate vs. Temperature, VS = ±15 V Figure 24. Output Voltage Swing vs. Supply Voltage, RL = 10 kΩ
100 +VS –40°C +25°C +85°C +125°C 90 –0.4 S 80 ) E –0.8 V G ( AT 70 L –1.2 s) ING µ –SR W V/ 60 S Y VO E E ( T PPL A 50 AG U +2.0 T R L S O O EW 40 +SR +1.6 V T SL UT 30 ED P R +1.2 UT ER 20 O +0.8 EF R 10 +0.4 0
4
–VS
27
–40 –25 –10 5 20 35 50 65 80 95 110 125
02
4
0
5 6 7 8 9 10 11 12 13 14 15 16 17
1- 1-
TEMPERATURE (°C)
73 73 09
SUPPLY VOLTAGE (±VS)
09 Figure 22. Slew Rate vs. Temperature, VS = ±5 V Figure 25. Output Voltage Swing vs. Supply Voltage, RL = 2 kΩ
+VS 15 –40°C –0.5 +25°C –40°C S +25°C –1.0 +85°C E 10 +85°C G +125°C ) A –1.5 +125°C T (V L G V) –2.0 IN 5 E ( W G Y VO –2.5 S A E T G L PPLU A 0 VO S LT T O +2.5 O T PU +2.0 T V IN ED U –5 R +1.5 TP ER U O EF +1.0 R –10 +0.5 –VS
5
–15 4 6 8 10 12 14 16 18
28 02
100 1k 10k 100k
0 1- 1-
SUPPLY VOLTAGE (±V
73 73
S) LOAD RESISTANCE (Ω)
09 09 Figure 23. Input Voltage Limit vs. Supply Voltage Figure 26. Output Voltage Swing vs. Load Resistance, VS = ±15 V Rev. A | Page 10 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE FILTER TERMINALS REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies and Grounding Reference Pin INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION IMAX Input Voltages Beyond the Rails Large Differential Input Voltage at High Gain RADIO FREQUENCY INTERFERENCE (RFI) CALCULATING THE NOISE OF THE INPUT STAGE Source Resistance Noise Voltage Noise of the Instrumentation Amplifier Current Noise of the Instrumentation Amplifier Total Noise Density Calculation APPLICATIONS INFORMATION EFFECT OF PASSIVE NETWORK ACROSS THE FILTER TERMINALS CIRCUITS USING THE FILTER TERMINALS Setting the Amplifier to Different Gains Low-Pass Filter Notch Filter Extracting the Common-Mode Voltage of the Input OUTLINE DIMENSIONS ORDERING GUIDE