Datasheet AD8428 (Analog Devices) - 3

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Data Sheet AD8428 SPECIFICATIONS
VS = ±15 V, VREF = 0 V, TA = 25°C, G = 2000, RL = 10 kΩ, unless otherwise noted.
Table 2. Test Conditions/ A Grade B Grade Parameter Comments Min Typ Max Min Typ Max Unit
COMMON-MODE REJECTION RATIO RTI, VCM = ±10 V (CMRR) DC to 60 Hz 130 140 dB At 50 kHz 110 120 dB NOISE (RTI) VIN+, VIN− = 0 V Voltage Noise f = 1 kHz 1.3 1.5 1.3 1.5 nV/√Hz f = 0.1 Hz to 10 Hz 40 50 40 50 nV p-p Current Noise f = 1 kHz 1.5 1.5 pA/√Hz f = 0.1 Hz to 10 Hz 150 150 pA p-p VOLTAGE OFFSET Input Offset, VOSI 100 25 μV Average TC TA = −40°C to +85°C 1 0.3 μV/°C Offset RTI vs. Supply (PSRR) 120 130 dB INPUT CURRENT Input Bias Current 200 50 nA Over Temperature TA = −40°C to +85°C 250 250 pA/°C Input Offset Current 50 10 nA Over Temperature TA = −40°C to +85°C 20 20 pA/°C DYNAMIC RESPONSE −3 dB Small Signal Bandwidth 3.5 3.5 MHz Settling Time to 0.01% 10 V step 0.75 0.75 μs Settling Time to 0.001% 10 V step 1.4 1.4 μs Slew Rate 40 50 40 50 V/μs GAIN First Stage Gain 200 200 V/V Subtractor Stage Gain 10 10 V/V Total Gain Error VOUT = −10 V to +10 V 0.2 0.05 % Total Gain Nonlinearity VOUT = −10 V to +10 V 5 5 ppm Gain Drift 10 5 ppm/°C INPUT Impedance (Pin to Ground)1 1||2 1||2 GΩ||pF Input Operating Voltage Range VS = ±4 V to ±18 V −VS + 2.5 +VS − 2.5 −VS + 2.5 +VS − 2.5 V Over Temperature TA = −40°C to +85°C −VS + 2.5 +VS − 2.5 −VS + 2.5 +VS − 2.5 V OUTPUT Output Voltage Swing RL = 2 kΩ −VS + 1.7 +VS − 1.2 −VS + 1.7 +VS − 1.2 V Over Temperature TA = −40°C −VS + 2.0 +VS − 1.3 −VS + 2.0 +VS − 1.3 V TA = +85°C −VS + 1.6 +VS − 1.1 −VS + 1.6 +VS − 1.1 V Output Voltage Swing RL = 10 kΩ −VS + 1.7 +VS − 1.0 −VS + 1.7 +VS − 1.0 V Over Temperature TA = −40°C −VS + 1.8 +VS − 1.2 −VS + 1.8 +VS − 1.2 V TA = +85°C −VS + 1.4 +VS − 0.9 −VS + 1.4 +VS − 0.9 V Short-Circuit Current 30 30 mA REFERENCE INPUT Input Impedance, RIN 132 132 kΩ Input Current, IIN VIN+, VIN− = 0 V 6.5 6.5 μA Voltage Range −VS +VS −VS +VS V Reference Gain to Output 1 1 V/V Reference Gain Error 0.01 0.01 % Rev. A | Page 3 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE FILTER TERMINALS REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Common-Mode Rejection Ratio over Frequency Power Supplies and Grounding Reference Pin INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION IMAX Input Voltages Beyond the Rails Large Differential Input Voltage at High Gain RADIO FREQUENCY INTERFERENCE (RFI) CALCULATING THE NOISE OF THE INPUT STAGE Source Resistance Noise Voltage Noise of the Instrumentation Amplifier Current Noise of the Instrumentation Amplifier Total Noise Density Calculation APPLICATIONS INFORMATION EFFECT OF PASSIVE NETWORK ACROSS THE FILTER TERMINALS CIRCUITS USING THE FILTER TERMINALS Setting the Amplifier to Different Gains Low-Pass Filter Notch Filter Extracting the Common-Mode Voltage of the Input OUTLINE DIMENSIONS ORDERING GUIDE