Datasheet 2N5655G, 2N5657G (ON Semiconductor) - 3
| Hersteller | ON Semiconductor |
| Beschreibung | Plastic NPN Silicon High-Voltage Power Transistors |
| Seiten / Seite | 6 / 3 — 2N5655G, 2N5657G. Figure 1. Power Derating. Figure 2. Sustaining Voltage … |
| Dateiformat / Größe | PDF / 189 Kb |
| Dokumentensprache | Englisch |
2N5655G, 2N5657G. Figure 1. Power Derating. Figure 2. Sustaining Voltage Test Circuit
Modelllinie für dieses Datenblatt
Textversion des Dokuments
link to page 3
2N5655G, 2N5657G
40 TTS) A 30 50 mH TION (W A 20 X 200 H TO SCOPE g RELAY + + 6.0 V 50 V 10 - , POWER DISSIP Y DP 300 1.0 025 50 75 100 125 150 TC, CASE TEMPERATURE (°C)
Figure 1. Power Derating Figure 2. Sustaining Voltage Test Circuit
Safe Area Limits are indicated by Figures 3 and 4. Both limits are applicable and must be observed. 1.0 There are two limitations on the power handling ability of 10 ms a transistor: average junction temperature and second 0.5 breakdown. Safe operating area curves indicate IC − VCE (AMP) 500 ms T limits of the transistor that must be observed for reliable J = 150°C 0.2 1.0 ms operation; i.e., the transistor must not be subjected to greater d dissipation than the curves indicate. 0.1 c The data of Figure 3 is based on T OR CURRENT J(pk) = 150_C; TC is Second Breakdown Limit variable depending on conditions. Second breakdown pulse Thermal Limit @ TC = 25°C 0.05 Bonding Wire Limit limits are valid for duty cycles to 10% provided TJ(pk) , COLLECT Curves apply below rated V ≤ 150_C. At high case temperatures, thermal limitations CEO I C 0.02 2N5655 will reduce the power that can be handled to values less than 2N5657 the limitations imposed by second breakdown. 0.0120 30 40 60 100 200 300 400 600 VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 3. Active−Region Safe Operating Area
300 200 VCE = 10 V VCE = 2.0 V T 100 J = +150°C GAIN 70 +100°C 50 + 25°C , DC CURRENT 30 FEh 20 -55°C 101.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100 200 300 500 IC, COLLECTOR CURRENT (mA)
Figure 4. Current Gain http://onsemi.com 3
2N5655G, 2N5657G
40 TTS) A 30 50 mH TION (W A 20 X 200 H TO SCOPE g RELAY + + 6.0 V 50 V 10 - , POWER DISSIP Y DP 300 1.0 025 50 75 100 125 150 TC, CASE TEMPERATURE (°C)
Figure 1. Power Derating Figure 2. Sustaining Voltage Test Circuit
Safe Area Limits are indicated by Figures 3 and 4. Both limits are applicable and must be observed. 1.0 There are two limitations on the power handling ability of 10 ms a transistor: average junction temperature and second 0.5 breakdown. Safe operating area curves indicate IC − VCE (AMP) 500 ms T limits of the transistor that must be observed for reliable J = 150°C 0.2 1.0 ms operation; i.e., the transistor must not be subjected to greater d dissipation than the curves indicate. 0.1 c The data of Figure 3 is based on T OR CURRENT J(pk) = 150_C; TC is Second Breakdown Limit variable depending on conditions. Second breakdown pulse Thermal Limit @ TC = 25°C 0.05 Bonding Wire Limit limits are valid for duty cycles to 10% provided TJ(pk) , COLLECT Curves apply below rated V ≤ 150_C. At high case temperatures, thermal limitations CEO I C 0.02 2N5655 will reduce the power that can be handled to values less than 2N5657 the limitations imposed by second breakdown. 0.0120 30 40 60 100 200 300 400 600 VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 3. Active−Region Safe Operating Area
300 200 VCE = 10 V VCE = 2.0 V T 100 J = +150°C GAIN 70 +100°C 50 + 25°C , DC CURRENT 30 FEh 20 -55°C 101.0 2.0 3.0 5.0 7.0 10 20 30 50 70 100 200 300 500 IC, COLLECTOR CURRENT (mA)
Figure 4. Current Gain http://onsemi.com 3