Datasheet AEM00330 (E-peas) - 8
| Hersteller | E-peas |
| Beschreibung | Highly Versatile Buck-Boost Ambient Energy Manager with Source Voltage Level Configuration |
| Seiten / Seite | 30 / 8 — DATASHEET. AEM00330. 2. Absolute Maximum Ratings. 3. Thermal Resistance |
| Dateiformat / Größe | PDF / 896 Kb |
| Dokumentensprache | Englisch |
DATASHEET. AEM00330. 2. Absolute Maximum Ratings. 3. Thermal Resistance
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DATASHEET AEM00330 2. Absolute Maximum Ratings
Parameter Value Voltage on LOAD, STO, SRC, BUFSRC, LIN, LOUT, BAL, CS_IN, EN_SLEEP, EN_STO_CH -0.3 V to 5.5 V Voltage on VINT, SRC_LVL_CFG[5:0], LOAD_CFG[2:0], STO_CFG[3:0], STO_PRIO, -0.3 V to 2.75 V STO_OVCH, STO_OVDIS, STO_RDY, EN_HP Operating junction temperature -40 °C to 125 °C Storage temperature -65 °C to 150 °C ESD HBM voltage > 2000 V ESD CDM voltage > 500 V Table 3: Absolute Maximum Ratings
3. Thermal Resistance
Package θJA θJC Unit QFN 40- pin TBD TBD °C/W Table 4: Thermal Resistance ESD CAUTION ESD (ELECTROSTATIC DISCHARGE) SENSITIVE DEVICE These devices have limited built-in ESD protection and damage may thus occur on devices subjected to high-energy ESD. Therefore, proper EESD precautions should be taken to avoid performance degradation or loss of functionality Table 5: ESD Caution DS_AEM00330_Rev1.0 Copyright © 2022 e-peas SA 8 Document Outline Table of Contents List of Tables 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset, Wake Up and Start States 7.2.1. Storage Element Priority Supercapacitor as a Storage Element Battery as a Storage Element 7.2.2. Load Priority 7.3. Supply State 7.4. Shutdown State 7.5. Sleep State 7.6. Source Voltage Regulation 7.7. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Load Configuration 8.4. Custom Mode Configuration 8.5. Disable Storage Element Charging 8.6. Source Level Configuration 8.7. External Components 8.7.1. Storage element information 8.7.2. External inductor information 8.7.3. External capacitors information CSRC CINT CLOAD 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode 9.6. DCDC Conversion Efficiency From STO to LOAD in Low Power Mode 9.7. DCDC Conversion Efficiency From STO to LOAD in High Power Mode 10. Schematic 11. Layout 12. Package Information 12.1. Plastic Quad Flatpack No-Lead (QFN 40-pin 5x5mm) 12.2. Board Layout 13. Revision History
Parameter Value Voltage on LOAD, STO, SRC, BUFSRC, LIN, LOUT, BAL, CS_IN, EN_SLEEP, EN_STO_CH -0.3 V to 5.5 V Voltage on VINT, SRC_LVL_CFG[5:0], LOAD_CFG[2:0], STO_CFG[3:0], STO_PRIO, -0.3 V to 2.75 V STO_OVCH, STO_OVDIS, STO_RDY, EN_HP Operating junction temperature -40 °C to 125 °C Storage temperature -65 °C to 150 °C ESD HBM voltage > 2000 V ESD CDM voltage > 500 V Table 3: Absolute Maximum Ratings
3. Thermal Resistance
Package θJA θJC Unit QFN 40- pin TBD TBD °C/W Table 4: Thermal Resistance ESD CAUTION ESD (ELECTROSTATIC DISCHARGE) SENSITIVE DEVICE These devices have limited built-in ESD protection and damage may thus occur on devices subjected to high-energy ESD. Therefore, proper EESD precautions should be taken to avoid performance degradation or loss of functionality Table 5: ESD Caution DS_AEM00330_Rev1.0 Copyright © 2022 e-peas SA 8 Document Outline Table of Contents List of Tables 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset, Wake Up and Start States 7.2.1. Storage Element Priority Supercapacitor as a Storage Element Battery as a Storage Element 7.2.2. Load Priority 7.3. Supply State 7.4. Shutdown State 7.5. Sleep State 7.6. Source Voltage Regulation 7.7. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Load Configuration 8.4. Custom Mode Configuration 8.5. Disable Storage Element Charging 8.6. Source Level Configuration 8.7. External Components 8.7.1. Storage element information 8.7.2. External inductor information 8.7.3. External capacitors information CSRC CINT CLOAD 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode 9.6. DCDC Conversion Efficiency From STO to LOAD in Low Power Mode 9.7. DCDC Conversion Efficiency From STO to LOAD in High Power Mode 10. Schematic 11. Layout 12. Package Information 12.1. Plastic Quad Flatpack No-Lead (QFN 40-pin 5x5mm) 12.2. Board Layout 13. Revision History