Datasheet NCP502, NCV502 (ON Semiconductor) - 6

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NCP502, NCV502 DEFINITIONS Load Regulation Line Regulation
The change in output voltage for a change in output The change in output voltage for a change in input voltage. current at a constant temperature. The measurement is made under conditions of low dissipation or by using pulse technique such that the average
Dropout Voltage
chip temperature is not significantly affected. The input/output differential at which the regulator output no longer maintains regulation against further reductions in
Line Transient Response
input voltage. Measured when the output drops 3.0% below Typical over and undershoot response when input voltage its nominal. The junction temperature, load current, and is excited with a given slope. minimum input supply requirements affect the dropout level.
Thermal Protection Maximum Power Dissipation
Internal thermal shutdown circuitry is provided to protect The maximum total dissipation for which the regulator the integrated circuit in the event that the maximum junction will operate within its specifications. temperature is exceeded. When activated at typically 160°C, the regulator turns off. This feature is provided to prevent
Quiescent Current
failures from accidental overheating. The quiescent current is the current which flows through the ground when the LDO operates without a load on its
Maximum Package Power Dissipation
output: internal IC operation, bias, etc. When the LDO The maximum power package dissipation is the power becomes loaded, this term is called the Ground current. It is dissipation level at which the junction temperature reaches actually the difference between the input current (measured its maximum operating value, i.e. 125°C. Depending on the through the LDO input pin) and the output current. ambient power dissipation and thus the maximum available output current.
APPLICATIONS INFORMATION
A typical application circuit for the NCP502 series is threshold are covered in the electrical specification section shown in Figure 1, front page. of this data sheet. If the enable is not used then the pin should be connected to Vin.
Input Decoupling (C1)
A 1.0 F capacitor either ceramic or tantalum is
Hints
recommended and should be connected close to the NCP502 Please be sure the Vin and GND lines are sufficiently package. Higher values and lower ESR will improve the wide. When the impedance of these lines is high, there is a overall line transient response. If large line or load transients chance to pick up noise or cause the regulator to are not expected, then it is possible to operate the regulator malfunction. without the use of a capacitor. Set external components, especially the output capacitor, TDK capacitor: C2012X5R1C105K, or C1608X5R1A105K as close as possible to the circuit, and make leads as short as possible.
Output Decoupling (C2)
The NCP502 is a stable regulator and does not require any
Thermal
specific Equivalent Series Resistance (ESR) or a minimum As power across the NCP502 increases, it might become output current. Capacitors exhibiting ESRs ranging from a necessary to provide some thermal relief. The maximum few m up to 5.0 can thus safely be used. The minimum power dissipation supported by the device is dependent decoupling value is 1.0 F and can be augmented to fulfill upon board design and layout. Mounting pad configuration stringent load transient requirements. The regulator accepts on the PCB, the board material and also the ambient ceramic chip capacitors as well as tantalum devices. Larger temperature effect the rate of temperature rise for the part. values improve noise rejection and load regulation transient This is stating that when the NCP502 has good thermal response. conductivity through the PCB, the junction temperature will TDK capacitor: C2012X5R1C105K, C1608X5R1A105K, be relatively low with high power dissipation applications. or C3216X7R1C105K
Enable Operation
The enable pin will turn on the regulator when pulled high and turn off the regulator when pulled low. These limits of
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