Datasheet A17700 (Allegro) - 7

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Pressure Sensor Interface and Signal Conditioning IC A17700 with Polynomial Signal Compensation and Advanced Diagnostics OPERATING CHARACTERISTICS:
Valid over the full supply voltage and ambient temperature ranges, unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ. Max. Unit ANALOG OUTPUT CHARACTERISTICS
Analog Output Effective Resolution [1] RES Across entire code range, theoretical noise-free OUT input, BW = 2.5 kHz; Gain1 = 3× (default) – 12.8 – bits V VCC = 5 V, RPD ≥ 4.4 kΩ or RPU ≥ 4.4 kΩ; CLAMP(HIGH) see Table 7 70 – 96 % VCC Analog Output Clamp Range [1] V VCC = 5 V, RPU ≥ 4.4 kΩ or RPD ≥ 4.4 kΩ; CLAMP(LOW) see Table 7 4 – 30 % VCC Analog Output Clamp Programming Step Size [1] VCLAMP(STP) Valid for VCLAMP(HIGH) and VCLAMP(LOW) – 1 – % VCC Analog Output Clamp Low Value V VCC = 5 V, 1.1 mA forced to output, LIMCLAMP(LOW) Clamp_Low code 0 (default) 0.1 0.2 0.3 V Analog Output Clamp High Value V VCC = 5 V, 1.1 mA forced to output, LIMCLAMP(HIGH) Clamp_High code 0 (default) 4.7 4.8 4.9 V Analog Output Load Capacitance [2] CL 10 100 120 nF Maximum Sourcing Current Isource 10 – 30 mA Maximum Sink Current Isink 10 – 30 mA Output Slew Rate [1] SR Isource = 10 mA, CL = 100 nF – – 100 V/ms Analog Output Load Resistance RPU Pull-up or pull-down resistor 4.4 10 – kΩ VDD_DAC = 5.0 V, BW = 2.5 kHz, TA = 25°C, Output Noise [1] VOUTnoise CL = 100 nF; DC input signal; VP = VN; – 0.65 – mVRMS Gain1 = 3× (default) and Gain2 = 7× (max) DC Output Impedance [1][3] ROUT TA = 25°C – 1 – Ω Across specified VCC range; relative to VCC = 5 V; Analog Output Ratiometry Error [1] RatErr output range from 10% to 90% VCC; – ±0.2 – % Gain1 = 3× (default) Full-Scale Linearity Error (INL); Output Linearity [1] LinERR output range from 10% to 90% VCC; – ±0.2 – %VCC Gain1 = 3× (default), Gain2 = 1× Overall Accuracy [1][4] – Over lifetime and temperature—Full signal path; Gain1 = 3× (default), Gain2 = 1× – ±0.3 – %VCC Pull-Up Voltage VPU Connected as per typical application circuit – – VCC V
BROKEN WIRE CHARACTERISTICS
Analog Output Diagnostic Saturation Vsat_diag_H VCC = 5 V, broken GND, IOUT(source) = 1.1 mA 4.7 4.9 5.0 V Voltage (Broken Wire Detection) Vsat_diag_L VCC = 5 V, broken VCC, IOUT(sink) = 1.1 mA 0.0 0.1 0.3 V [1] Guaranteed by design. Not tested in production. [2] Larger output load capacitance up to 330 nF is not tested in production but can be handled by the device with DAC Output Cap driver EEPROM parameter set to code 2 (See EEPROM MAP). [3] Output impedance given for frequencies < 400 Hz. [4] Overall accuracy considers ideal compensation over temperature and full Wheatstone bridge (all four resistors changing depending on sensed stress). 7 Allegro MicroSystems 955 Perimeter Road Manchester, NH 03103-3353 U.S.A. www.allegromicro.com Document Outline Features and Benefits Description Package Functional Block Diagram Selection Guide Absolute Maximum Ratings Thermal Characteristics Pinout Diagram and Terminal List Operating Characteristics Functional Description Bandwidth Selection Output Response Time Power-On Time Front End Gain Adjustment Front End Differential Offset Adjustment Input Signal Range Calculation Fine Adjustment and Temperature Compensation Output Protocols Digital Output Mode Selection Digital Output Driver Fall Time Selection Broken Wire Detection Diagnostic Features Programming: Manchester Communication Entering Manchester Coding Manchester Interface Message Structure CRC Device Access Shadow Registers Device EEPROM and Register Access Lock EEPROM Map Volatile Registers Map Power Derating Package Outline Drawing