Datasheet AD5522 (Analog Devices) - 2
| Hersteller | Analog Devices |
| Beschreibung | Quad Parametric Measurement Unit with Integrated 16-Bit Level Setting DACs |
| Seiten / Seite | 64 / 2 — AD5522. Data Sheet. TABLE OF CONTENTS |
| Revision | F |
| Dateiformat / Größe | PDF / 1.6 Mb |
| Dokumentensprache | Englisch |
AD5522. Data Sheet. TABLE OF CONTENTS
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AD5522 Data Sheet TABLE OF CONTENTS
Features .. 1 Calibration... 38 Applications ... 1 Additional Calibration ... 39 Functional Block Diagram .. 1 System Level Calibration ... 39 Revision History ... 3 Circuit Operation ... 40 General Description ... 4 Force Voltage (FV) Mode .. 40 Specifications ... 6 Force Current (FI) Mode ... 41 Timing Characteristics .. 11 Serial Interface .. 42 Absolute Maximum Ratings .. 15 SPI Interface .. 42 Thermal Resistance .. 15 LVDS Interface.. 42 ESD Caution .. 15 Serial Interface Write Mode .. 42 Pin Configurations and Function Descriptions ... 16 RESET Function ... 42 Typical Performance Characteristics ... 22 BUSY and LOAD Functions ... 42 Terminology .. 29 Register Update Rates .. 44 Theory of Operation .. 30 Register Selection ... 44 Force Amplifier ... 30 Write System Control Register ... 46 Comparators .. 30 Write PMU Register ... 48 Clamps ... 30 Write DAC Register ... 50 Current Range Selection .. 31 Read Registers ... 53 High Current Ranges ... 31 Readback of System Control Register.. 54 Measure Current Gains.. 32 Readback of PMU Register ... 55 VMID Voltage ... 32 Readback of Comparator Status Register .. 56 Choosing Power Supply Rails ... 33 Readback of Alarm Status Register .. 56 Measure Output (MEASOUTx Pins)... 33 Readback of DAC Register .. 57 Device Under Test Ground (DUTGND)... 33 Applications Information .. 58 Guard Amplifier ... 34 Power-On Default .. 58 Compensation Capacitors ... 34 Setting Up the Device on Power-On ... 58 System Force and Sense Switches ... 35 Changing Modes .. 59 Temperature Sensor ... 35 Required External Components ... 59 DAC Levels .. 36 Power Supply Decoupling ... 60 Offset DAC .. 36 Power Supply Sequencing ... 60 Gain and Offset Registers .. 36 Typical Application for the AD5522 .. 60 Cached X2 Registers ... 37 Outline Dimensions ... 62 Reference Voltage (VREF) ... 37 Ordering Guide .. 63 Reference Selection .. 37 Rev. F | Page 2 of 64 Document Outline Features Applications Functional Block Diagram Revision History General Description Specifications Timing Characteristics Circuit and Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Force Amplifier Comparators Clamps Current Range Selection High Current Ranges Measure Current Gains VMID Voltage Choosing Power Supply Rails Measure Output (MEASOUTx Pins) Device Under Test Ground (DUTGND) Guard Amplifier Compensation Capacitors System Force and Sense Switches Temperature Sensor DAC Levels Offset DAC Gain and Offset Registers Cached X2 Registers Gain and Offset Registers for the FIN DAC Gain and Offset Registers for the Comparator DACs Gain and Offset Registers for the Clamp DACs Reference Voltage (VREF) Reference Selection Reference Selection Example Calibration Reducing Zero-Scale Error Reducing Gain Error Calibration Example Additional Calibration System Level Calibration Circuit Operation Force Voltage (FV) Mode Force Current (FI) Mode Serial Interface SPI Interface LVDS Interface Serial Interface Write Mode RESETB Function BUSYB and LOADB Functions Register Update Rates Register Selection Readback Control, RD/WRB PMU Address Bits: PMU3, PMU2, PMU1, PMU0 NOP (No Operation) Reserved Commands Write System Control Register Write PMU Register Write DAC Register DAC Addressing Read Registers Readback of System Control Register Readback of PMU Register Readback of Comparator Status Register Readback of Alarm Status Register Readback of DAC Register Applications Information Power-On Default Setting Up the Device on Power-On Changing Modes Required External Components Power Supply Decoupling Power Supply Sequencing Typical Application for the AD5522 Outline Dimensions Ordering Guide
AD5522 Data Sheet TABLE OF CONTENTS
Features .. 1 Calibration... 38 Applications ... 1 Additional Calibration ... 39 Functional Block Diagram .. 1 System Level Calibration ... 39 Revision History ... 3 Circuit Operation ... 40 General Description ... 4 Force Voltage (FV) Mode .. 40 Specifications ... 6 Force Current (FI) Mode ... 41 Timing Characteristics .. 11 Serial Interface .. 42 Absolute Maximum Ratings .. 15 SPI Interface .. 42 Thermal Resistance .. 15 LVDS Interface.. 42 ESD Caution .. 15 Serial Interface Write Mode .. 42 Pin Configurations and Function Descriptions ... 16 RESET Function ... 42 Typical Performance Characteristics ... 22 BUSY and LOAD Functions ... 42 Terminology .. 29 Register Update Rates .. 44 Theory of Operation .. 30 Register Selection ... 44 Force Amplifier ... 30 Write System Control Register ... 46 Comparators .. 30 Write PMU Register ... 48 Clamps ... 30 Write DAC Register ... 50 Current Range Selection .. 31 Read Registers ... 53 High Current Ranges ... 31 Readback of System Control Register.. 54 Measure Current Gains.. 32 Readback of PMU Register ... 55 VMID Voltage ... 32 Readback of Comparator Status Register .. 56 Choosing Power Supply Rails ... 33 Readback of Alarm Status Register .. 56 Measure Output (MEASOUTx Pins)... 33 Readback of DAC Register .. 57 Device Under Test Ground (DUTGND)... 33 Applications Information .. 58 Guard Amplifier ... 34 Power-On Default .. 58 Compensation Capacitors ... 34 Setting Up the Device on Power-On ... 58 System Force and Sense Switches ... 35 Changing Modes .. 59 Temperature Sensor ... 35 Required External Components ... 59 DAC Levels .. 36 Power Supply Decoupling ... 60 Offset DAC .. 36 Power Supply Sequencing ... 60 Gain and Offset Registers .. 36 Typical Application for the AD5522 .. 60 Cached X2 Registers ... 37 Outline Dimensions ... 62 Reference Voltage (VREF) ... 37 Ordering Guide .. 63 Reference Selection .. 37 Rev. F | Page 2 of 64 Document Outline Features Applications Functional Block Diagram Revision History General Description Specifications Timing Characteristics Circuit and Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Force Amplifier Comparators Clamps Current Range Selection High Current Ranges Measure Current Gains VMID Voltage Choosing Power Supply Rails Measure Output (MEASOUTx Pins) Device Under Test Ground (DUTGND) Guard Amplifier Compensation Capacitors System Force and Sense Switches Temperature Sensor DAC Levels Offset DAC Gain and Offset Registers Cached X2 Registers Gain and Offset Registers for the FIN DAC Gain and Offset Registers for the Comparator DACs Gain and Offset Registers for the Clamp DACs Reference Voltage (VREF) Reference Selection Reference Selection Example Calibration Reducing Zero-Scale Error Reducing Gain Error Calibration Example Additional Calibration System Level Calibration Circuit Operation Force Voltage (FV) Mode Force Current (FI) Mode Serial Interface SPI Interface LVDS Interface Serial Interface Write Mode RESETB Function BUSYB and LOADB Functions Register Update Rates Register Selection Readback Control, RD/WRB PMU Address Bits: PMU3, PMU2, PMU1, PMU0 NOP (No Operation) Reserved Commands Write System Control Register Write PMU Register Write DAC Register DAC Addressing Read Registers Readback of System Control Register Readback of PMU Register Readback of Comparator Status Register Readback of Alarm Status Register Readback of DAC Register Applications Information Power-On Default Setting Up the Device on Power-On Changing Modes Required External Components Power Supply Decoupling Power Supply Sequencing Typical Application for the AD5522 Outline Dimensions Ordering Guide