Datasheet ADPA7006CHIP (Analog Devices) - 4

ADPA7006CHIP Data Sheet 28 GHz TO 36 GHz FREQUENCY RANGE
TA = 25°C, VDD = 5 V, IDQ = 800 mA for nominal operation, unless otherwise noted.
Table 3. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 28 36 GHz GAIN 21.5 23.5 dB Gain Flatness ±0.5 dB Gain Variation Over Temperature 0.016 dB/°C NOISE FIGURE 5.5 dB RETURN LOSS Input 16 dB Output 23 dB OUTPUT Output Power for 1 dB Compression P1dB 26.5 29 dBm Saturated Output Power PSAT 29.5 dBm Output Third-Order Intercept IP3 38 dBm Measurement taken at POUT per tone = 14 dBm SUPPLY Current IDQ 800 mA Adjust the gate bias voltage (VGGx) from −1.5 V to 0 V to achieve the desired IDQ Voltage VDD 4 5 V
36 GHz TO 44 GHz FREQUENCY RANGE
TA = 25°C, VDD = 5 V, IDQ = 800 mA for nominal operation, unless otherwise noted.
Table 4. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 34 44 GHz GAIN 21 23 dB Gain Flatness ±0.3 dB Gain Variation Over Temperature 0.03 dB/°C NOISE FIGURE 5 dB RETURN LOSS Input 23 dB Output 23 dB OUTPUT Output Power for 1 dB Compression P1dB 24.2 27 dBm Saturated Output Power PSAT 28 dBm Output Third-Order Intercept IP3 38 dBm Measurement taken at POUT per tone = 14 dBm SUPPLY Current IDQ 800 mA Adjust the gate bias voltage (VGGX) from −1.5 V to 0 V to achieve the desired IDQ Voltage VDD 4 5 V Rev. 0 | Page 4 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 18 GHz TO 20 GHz FREQUENCY RANGE 20 GHz TO 28 GHz FREQUENCY RANGE 28 GHz TO 36 GHz FREQUENCY RANGE 36 GHz TO 44 GHz FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTIC CONSTANT DRAIN CURRENT (IDD) OPERATION THEORY OF OPERATION APPLICATIONS INFORMATION MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICS Handling Precautions Mounting Wire Bonding BIASING THE ADPA7006CHIP WITH THE HMC980LP4E APPLICATION CIRCUIT SETUP LIMITING VGATE FOR THE ADPA7006CHIP VGGx AMR (ABSOLUTE MAXIMUM RATING) REQUIREMENT HMC980LP4E BIAS SEQUENCE Power-Up Sequence Power-Down Sequence CONSTANT DRAIN CURRENT BIASING vs. CONSTANT GATE VOLTAGE BIASING TYPICAL APPLICATION CIRCUIT ASSEMBLY DIAGRAMS OUTLINE DIMENSIONS ORDERING GUIDE