Datasheet ADPA7006CHIP (Analog Devices) - 3

Data Sheet ADPA7006CHIP SPECIFICATIONS 18 GHz TO 20 GHz FREQUENCY RANGE
TA = 25°C, VDD = 5 V, quiescent supply current (IDQ) = 800 mA for nominal operation, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 18 20 GHz GAIN 22.5 dB Gain Flatness ±0.75 dB Gain Variation Over Temperature 0.011 dB/°C NOISE FIGURE 9.5 dB RETURN LOSS Input 13 dB Output 17 dB OUTPUT Output Power for 1 dB Compression P1dB 26 dBm Saturated Output Power PSAT 27 dBm Output Third-Order Intercept IP3 34 dBm Measurement taken at output power (POUT) per tone = 14 dBm SUPPLY Current IDQ 800 mA Adjust the gate bias voltage (VGGx) from −1.5 V to 0 V to achieve the desired IDQ Voltage VDD 4 5 V
20 GHz TO 28 GHz FREQUENCY RANGE
TA = 25°C, VDD = 5 V, quiescent supply current (IDQ) = 800 mA for nominal operation, unless otherwise noted.
Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
FREQUENCY RANGE 20 28 GHz GAIN 23 25 dB Gain Flatness ±1.0 dB Gain Variation Over Temperature 0.026 dB/°C NOISE FIGURE 7.5 dB RETURN LOSS Input 16 dB Output 24 dB OUTPUT Output Power for 1 dB Compression P1dB 26.0 28.5 dBm Saturated Output Power PSAT 29 dBm Output Third-Order Intercept IP3 36 dBm Measurement taken at POUT per tone = 14 dBm SUPPLY Current IDQ 800 mA Adjust the gate bias voltage (VGGX) from −1.5 V to 0 V to achieve the desired IDQ Voltage VDD 4 5 V Rev. 0 | Page 3 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 18 GHz TO 20 GHz FREQUENCY RANGE 20 GHz TO 28 GHz FREQUENCY RANGE 28 GHz TO 36 GHz FREQUENCY RANGE 36 GHz TO 44 GHz FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTIC CONSTANT DRAIN CURRENT (IDD) OPERATION THEORY OF OPERATION APPLICATIONS INFORMATION MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GaAs MMICS Handling Precautions Mounting Wire Bonding BIASING THE ADPA7006CHIP WITH THE HMC980LP4E APPLICATION CIRCUIT SETUP LIMITING VGATE FOR THE ADPA7006CHIP VGGx AMR (ABSOLUTE MAXIMUM RATING) REQUIREMENT HMC980LP4E BIAS SEQUENCE Power-Up Sequence Power-Down Sequence CONSTANT DRAIN CURRENT BIASING vs. CONSTANT GATE VOLTAGE BIASING TYPICAL APPLICATION CIRCUIT ASSEMBLY DIAGRAMS OUTLINE DIMENSIONS ORDERING GUIDE