Datasheet AD826 (Analog Devices) - 10

AD826 THEORY OF OPERATION
The AD826 is a low cost, wide band, high performance dual For high performance circuits, it is recommended that a operational amplifier which can drive heavy capacitive and “balancing” resistor be used to reduce the offset errors caused resistive loads. It also achieves a constant slew rate, bandwidth by bias current flowing through the input and feedback resistors. and settling time over its entire specified temperature range. The balancing resistor equals the parallel combination of RIN The AD826 (Figure 35) consists of a degenerated NPN and RF and thus provides a matched impedance at each input differential pair driving matched PNPs in a folded-cascode gain terminal. The offset voltage error will then be reduced by more stage. The output buffer stage employs emitter followers in a than an order of magnitude. class AB amplifier which delivers the necessary current to the
APPLYING THE AD826
load while maintaining low levels of distortion. The AD826 is a breakthrough dual amp that delivers precision
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and speed at low cost with low power consumption. The AD826 offers excellent static and dynamic matching characteristics, combined with the ability to drive heavy resistive and capacitive loads. As with all high frequency circuits, care should be taken to maintain overall device performance as well as their matching. The following items are presented as general design considerations.
CF OUTPUT Circuit Board Layout
Input and output runs should be laid out so as to physically
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isolate them from remaining runs. In addition, the feedback resistor of each amplifier should be placed away from the feedback resistor of the other amplifier, since this greatly reduces inter-amp coupling.
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In order to prevent the stray capacitance present at each amplifier’s summing junction from limiting its performance,
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the feedback resistors should be ≤1 kΩ. Since the summing
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junction capacitance may cause peaking, a small capacitor Figure 35. Simplified Schematic (1 pF–5pF) maybe paralleled with RF to neutralize this effect. Finally, sockets should be avoided, because of their tendency to The capacitor, CF, in the output stage mitigates the effect of increase interlead capacitance. capacitive loads. With low capacitive loads, the gain from the compensation node to the output is very close to unity. In this
Power Supply Considerations
case, CF is bootstrapped and does not contribute to the overall To ensure the proper operation of the AD826, connect the compensation capacitance of the device. As the capacitive load positive supply before the negative supply. Also, proper power is increased, a pole is formed with the output impedance of the supply decoupling is critical to preserve the integrity of high output stage. This reduces the gain, and therefore, CF is frequency signals. In carefully laid out designs, decoupling incompletely bootstrapped. Effectively, some fraction of CF capacitors should be placed in close proximity to the supply contributes to the overall compensation capacitance, reducing pins, while their lead lengths should be kept to a minimum. the unity gain bandwidth. As the load capacitance is further These measures greatly reduce undesired inductive effects on increased, the bandwidth continues to fall, maintaining the the amplifier’s response. stability of the amplifier. Though two 0.1 μF capacitors will typically be effective in
INPUT CONSIDERATIONS
decoupling the supplies, several capacitors of different values An input protection resistor (R can be paralleled to cover a wider frequency range. IN in Figure 25) is required in circuits where the input to the AD826 will be subjected to transient or continuous overload voltages exceeding the ±6 V maximum differential limit. This resistor provides protection for the input transistors by limiting their maximum base current. -10- Rev. C