Datasheet ADA4817-1, ADA4817-2 (Analog Devices) - 7

HerstellerAnalog Devices
BeschreibungDual, Low Noise, 1 GHz FastFET Op Amplifier
Seiten / Seite31 / 7 — Data Sheet. ADA4817-1. /ADA4817-2. Parameter. Test Conditions/Comments. …
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DokumentenspracheEnglisch

Data Sheet. ADA4817-1. /ADA4817-2. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit

Data Sheet ADA4817-1 /ADA4817-2 Parameter Test Conditions/Comments Min Typ Max Unit

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Data Sheet ADA4817-1 /ADA4817-2 Parameter Test Conditions/Comments Min Typ Max Unit
Input Voltage Noise f = 100 kHz 4 nV/√Hz Input Current Noise f = 100 kHz 2.5 fA/√Hz DC PERFORMANCE Input Offset Voltage 0.5 2.3 mV TMIN to TMAX, SOIC 6.5 mV TMIN to TMAX, LFCSP 5 mV Input Offset Voltage Drift TMIN to TMAX, SOIC 25 75 µV/°C TMIN to TMAX, LFCSP 10 45 µV/°C Input Bias Current 2 20 pA TMIN to TMAX 50 70 pA Input Bias Offset Current 1 10 pA TMIN to TMAX 65 pA Open-Loop Gain 61 63 dB INPUT CHARACTERISTICS Input Resistance Common mode 500 GΩ Input Capacitance Common mode 1.3 pF Differential mode 0.1 pF Input Common-Mode Voltage Range −VS to (+VS − 2.9) V Common-Mode Rejection VCM = ±0.25 V −72 −83 dB VCM = ±0.3 V, TMIN to TMAX −70 dB VCM = ±0.8 V, TMIN to TMAX −59 dB OUTPUT CHARACTERISTICS Output Overdrive Recovery Time VIN = ±1.25 V, G = 2 13 ns Output Voltage Swing High RL = 100 Ω +VS − 1.3 +VS − 1.2 V RL = 100 Ω, TMIN to TMAX +VS − 1.4 V RL = 1 kΩ +VS − 1.1 +VS − 1 V RL = 1 kΩ, TMIN to TMAX +VS − 1.2 V Low RL = 100 Ω −VS + 1 −VS + 1.1 V RL = 100 Ω, TMIN to TMAX −VS + 1.2 V RL = 1 kΩ −VS + 0.9 −VS + 1 V RL = 1 kΩ, TMIN to TMAX −VS + 1.1 V Linear Output Current 1% output error 20 mA Short-Circuit Current Sinking 40 mA Sourcing 130 mA POWER-DOWN PD Pin Voltage Enabled, TMIN to TMAX >+VS − 0.9 V Powered down, TMIN to TMAX <+VS − 3.5 V Turn On Time 0.2 µs Turn Off Time 0.7 µs Input Leakage Current PD = +VS 0.2 3 µA PD = −VS 31 53 µA POWER SUPPLY Operating Range 5 10 V Quiescent Current per Amplifier 14 16 mA Powered Down Quiescent Current 1.5 2.8 mA Positive Power Supply Rejection +VS = 4.75 V to 5.25 V, −VS = 0 V −66 −71 dB Negative Power Supply Rejection +VS = 5 V, −VS = −0.25 V to +0.25 V −63 −69 dB Rev. G | Page 7 of 31 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ±5 V OPERATION 5 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM SAFE POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION CLOSED-LOOP FREQUENCY RESPONSE NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE INVERTING CLOSED-LOOP FREQUENCY RESPONSE WIDEBAND OPERATION DRIVING CAPACITIVE LOADS THERMAL CONSIDERATIONS POWER-DOWN OPERATION CAPACITIVE FEEDBACK HIGHER FREQUENCY ATTENUATION LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING EXPOSED PAD LEAKAGE CURRENTS INPUT CAPACITANCE INPUT-TO-INPUT/OUTPUT COUPLING APPLICATIONS INFORMATION LOW DISTORTION PINOUT WIDEBAND PHOTODIODE PREAMP HIGH SPEED JFET INPUT INSTRUMENTATION AMPLIFIER ACTIVE LOW-PASS FILTER (LPF) OUTLINE DIMENSIONS ORDERING GUIDE