Datasheet ADA4817-1, ADA4817-2 (Analog Devices) - 9
| Hersteller | Analog Devices |
| Beschreibung | Dual, Low Noise, 1 GHz FastFET Op Amplifier |
| Seiten / Seite | 31 / 9 — Data Sheet. ADA4817-1. /ADA4817-2. PIN CONFIGURATIONS AND FUNCTION … |
| Revision | G |
| Dateiformat / Größe | PDF / 632 Kb |
| Dokumentensprache | Englisch |
Data Sheet. ADA4817-1. /ADA4817-2. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. TOP VIEW. (Not to Scale). PD 1. 8 +VS. FB 2. 7 OUT. –IN 3
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Data Sheet ADA4817-1 /ADA4817-2 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS ADA4817-1 TOP VIEW (Not to Scale) PD 1 8 +VS FB 2 7 OUT –IN 3 6 NIC +IN 4 5 –VS NOTES 1. NIC = NO INTERNAL CONNECTION.
005
2. EXPOSED PAD. CAN BE CONNECTED TO GND, –VS PLANE, OR LEFT FLOATING.
07756- Figure 5. ADA4817-1 Pin Configuration (8-Lead LFCSP)
Table 5. ADA4817-1 Pin Function Descriptions (8-Lead LFCSP) Pin No. Mnemonic Description
1 PD Power-Down. Do not leave floating. 2 FB Feedback Pin. 3 −IN Inverting Input. 4 +IN Noninverting Input. 5 −VS Negative Supply. 6 NIC No Internal Connection. 7 OUT Output. 8 +VS Positive Supply. EPAD Exposed Pad. Can be connected to GND, −VS plane, or left floating.
ADA4817-1 TOP VIEW (Not to Scale) FB 1 8 PD –IN 2 7 +VS +IN 3 6 OUT –VS 4 5 NIC NOTES 1. NIC = NO INTERNAL CONNECTION.
006
2. EXPOSED PAD. CAN BE CONNECTED TO GND, −VS PLANE, OR LEFT FLOATING.
07756- Figure 6. ADA4817-1 Pin Configuration (8-Lead SOIC)
Table 6. ADA4817-1 Pin Function Descriptions (8-Lead SOIC) Pin No. Mnemonic Description
1 FB Feedback Pin. 2 −IN Inverting Input. 3 +IN Noninverting Input. 4 −VS Negative Supply. 5 NIC No Internal Connection. 6 OUT Output. 7 +VS Positive Supply. 8 PD Power-Down. Do not leave floating. EPAD Exposed Pad. Can be connected to GND, −VS plane, or left floating. Rev. G | Page 9 of 31 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ±5 V OPERATION 5 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM SAFE POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION CLOSED-LOOP FREQUENCY RESPONSE NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE INVERTING CLOSED-LOOP FREQUENCY RESPONSE WIDEBAND OPERATION DRIVING CAPACITIVE LOADS THERMAL CONSIDERATIONS POWER-DOWN OPERATION CAPACITIVE FEEDBACK HIGHER FREQUENCY ATTENUATION LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING EXPOSED PAD LEAKAGE CURRENTS INPUT CAPACITANCE INPUT-TO-INPUT/OUTPUT COUPLING APPLICATIONS INFORMATION LOW DISTORTION PINOUT WIDEBAND PHOTODIODE PREAMP HIGH SPEED JFET INPUT INSTRUMENTATION AMPLIFIER ACTIVE LOW-PASS FILTER (LPF) OUTLINE DIMENSIONS ORDERING GUIDE
005
2. EXPOSED PAD. CAN BE CONNECTED TO GND, –VS PLANE, OR LEFT FLOATING.
07756- Figure 5. ADA4817-1 Pin Configuration (8-Lead LFCSP)
Table 5. ADA4817-1 Pin Function Descriptions (8-Lead LFCSP) Pin No. Mnemonic Description
1 PD Power-Down. Do not leave floating. 2 FB Feedback Pin. 3 −IN Inverting Input. 4 +IN Noninverting Input. 5 −VS Negative Supply. 6 NIC No Internal Connection. 7 OUT Output. 8 +VS Positive Supply. EPAD Exposed Pad. Can be connected to GND, −VS plane, or left floating.
ADA4817-1 TOP VIEW (Not to Scale) FB 1 8 PD –IN 2 7 +VS +IN 3 6 OUT –VS 4 5 NIC NOTES 1. NIC = NO INTERNAL CONNECTION.
006
2. EXPOSED PAD. CAN BE CONNECTED TO GND, −VS PLANE, OR LEFT FLOATING.
07756- Figure 6. ADA4817-1 Pin Configuration (8-Lead SOIC)
Table 6. ADA4817-1 Pin Function Descriptions (8-Lead SOIC) Pin No. Mnemonic Description
1 FB Feedback Pin. 2 −IN Inverting Input. 3 +IN Noninverting Input. 4 −VS Negative Supply. 5 NIC No Internal Connection. 6 OUT Output. 7 +VS Positive Supply. 8 PD Power-Down. Do not leave floating. EPAD Exposed Pad. Can be connected to GND, −VS plane, or left floating. Rev. G | Page 9 of 31 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ±5 V OPERATION 5 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM SAFE POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION CLOSED-LOOP FREQUENCY RESPONSE NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE INVERTING CLOSED-LOOP FREQUENCY RESPONSE WIDEBAND OPERATION DRIVING CAPACITIVE LOADS THERMAL CONSIDERATIONS POWER-DOWN OPERATION CAPACITIVE FEEDBACK HIGHER FREQUENCY ATTENUATION LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING EXPOSED PAD LEAKAGE CURRENTS INPUT CAPACITANCE INPUT-TO-INPUT/OUTPUT COUPLING APPLICATIONS INFORMATION LOW DISTORTION PINOUT WIDEBAND PHOTODIODE PREAMP HIGH SPEED JFET INPUT INSTRUMENTATION AMPLIFIER ACTIVE LOW-PASS FILTER (LPF) OUTLINE DIMENSIONS ORDERING GUIDE