Datasheet AD8233 (Analog Devices) - 7

Data Sheet AD8233 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS BALL A1 AD8233 INDICATOR 1 2 3 4 5 GND +VS REFIN HPSENSE HPDRIVE A SDN AC/DC FR IAOUT +IN B LOD RLD SDN REFOUT RLDFB –IN C OUT OPAMP– OPAMP+ SW RLD D TOP VIEW
002
(BALL SIDE DOWN) Not to Scale
13737- Figure 2. 20-Ball WLCSP Pin Configuration
Table 5. 20-Ball WLCSP Pin Function Descriptions Ball No. Mnemonic Description
A1 GND Power Supply Ground. A2 +VS Power Supply Terminal. A3 REFIN Reference Buffer Input. Use REFIN, a high impedance input terminal, to set the level of the reference buffer. A4 HPSENSE High-Pass Sense Input for Instrumentation Amplifier. Connect HPSENSE to the junction of R and C that sets the corner frequency of the dc blocking circuit. A5 HPDRIVE High-Pass Driver Output. Connect HPDRIVE to the capacitor in the first high-pass filter. The AD8233 drives this pin to keep HPSENSE at the same level as the reference voltage. B1 SDN Shutdown Control Input. Drive SDN low to enter the low power shutdown mode. B2 AC/DC Leads Off Mode Control Input. Drive the AC/DC pin low for dc leads off mode. Drive the AC/DC pin high for ac leads off mode. B3 FR Fast Restore Control Input. Drive FR high to enable fast recovery mode. Otherwise, drive it low. B4 IAOUT Instrumentation Amplifier Output Terminal. B5 +IN Instrumentation Amplifier, Positive Input. +IN is typically connected to the left arm (LA) electrode. C1 LOD Leads Off Detection Comparator Output. C2 RLD SDN Right Leg Drive Shutdown Control Input. Drive RLD SDN low to power down the RLD amplifier. C3 REFOUT Reference Buffer Output. The instrumentation amplifier output is referenced to this potential. Use REFOUT as a virtual ground for any point in the circuit that requires a signal reference. C4 RLDFB Right Leg Drive Feedback Input. RLDFB is the feedback terminal for the right leg drive circuit. C5 −IN Instrumentation Amplifier, Negative Input. −IN is typically connected to the right arm (RA) electrode. D1 OUT Operational Amplifier Output. The fully conditioned heart rate signal is present at this output. OUT can be connected to the input of an ADC. D2 OPAMP− Operational Amplifier Inverting Input. D3 OPAMP+ Operational Amplifier Noninverting Input. D4 SW Fast Restore Switch Terminal. Connect this terminal to the output of the second high-pass filter. D5 RLD Right Leg Drive Output. Connect the driven electrode (typically right leg) to the RLD pin. Rev. D | Page 7 of 32 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS INSTRUMENTATION AMPLIFIER PERFORMANCE CHARACTERISTICS OPERATIONAL AMPLIFIER PERFORMANCE CHARACTERISTICS RLD AMPLIFIER PERFORMANCE CHARACTERISTICS REFERENCE BUFFER PERFORMANCE CHARACTERISTICS SYSTEM PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE OVERVIEW INSTRUMENTATION AMPLIFIER OPERATIONAL AMPLIFIER RLD AMPLIFIER REFERENCE BUFFER FAST RESTORE CIRCUIT LEADS ON OR OFF DETECTION DC Leads On or Off Detection AC Leads On or Off Detection STANDBY OPERATION INPUT PROTECTION RADIO FREQUENCY INTERFERENCE POWER SUPPLY REGULATION AND BYPASSING INPUT REFERRED OFFSETS LAYOUT RECOMMENDATIONS APPLICATION INFORMATION ELIMINATING ELECTRODE OFFSETS HIGH-PASS FILTERING Two-Pole High-Pass Filter Additional High-Pass Filtering Options LOW-PASS FILTERING AND GAIN Driving ADCs DRIVEN ELECTRODE MEASURING SURFACE ELECTROMYOGRAPHY (EMG) OR ELECTROENCEPHALOGRAPHY (EEG) APPLICATION CIRCUITS Heart Rate Measurement (HRM) Next to the Heart Exercise Application, HRM at the Hands Holter Monitor Configuration Portable Heart Rate and Activity Monitor System Synchronous ECG and Photoplethysmography (PPG) Measurement Using Transimpedance Amplifier (TIA) ADC Mode Using the ADPD1080 USING AD5940, AD8232, AND AD8233 FOR BIOIMPEDANCE AND ELECTROCARDIOGRAM (ECG) MEASUREMENTS DIE INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE