Datasheet ADCMP561, ADCMP562 (Analog Devices) - 4

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ADCMP561/ADCMP562 Data Sheet Parameter Symbol Conditions Min Typ Max Unit
AC PERFORMANCE (continued) Equivalent Input Rise Time Bandwidth1 BWEQ 0 V to 1 V swing, 2 V/ns 1500 MHz Maximum Toggle Rate >50% output swing 800 MHz Minimum Pulse Width PWMIN ΔtPD < 25 ps 700 ps RMS Random Jitter VOD = 400 mV, 1.3 V/ns, 312 MHz, 1.0 ps 50% duty cycle Unit-to-Unit Propagation Delay Skew 100 ps POWER SUPPLY Positive Supply Current IVCC @ +5.0 V 2 3.2 5 mA Negative Supply Current IVEE @ −5.2 V 10 22 28 mA Logic Supply Current IVDD @ 3.3 V without load 6 9 13 mA Logic Supply Current @ 3.3 V with load 45 60 70 mA Positive Supply Voltage VCC Dual 4.75 5.0 5.25 V Negative Supply Voltage VEE Dual −4.96 −5.2 −5.45 V Logic Supply Voltage VDD Dual 2.5 3.3 5.0 V Power Dissipation PD Dual, without load 130 160 190 mW Power Dissipation Dual, with load 180 220 250 mW DC Power Supply Rejection Ratio—VCC PSRRVCC 85 dB DC Power Supply Rejection Ratio—VEE PSRRVEE 85 dB DC Power Supply Rejection Ratio—VDD PSRRVDD 85 dB HYSTERESIS (ADCMP562 Only) Hysteresis RHYS = 19.5 kΩ 20 mV RHYS = 8.0 kΩ 70 mV 1 Equivalent input rise time bandwidth assumes a first-order input response and is calculated by the fol owing formula: BW 2 2 EQ = 0.22/√ (trCOMP – trIN ), where trIN is the 20/80 input transition time applied to the comparator and trCOMP is the effective transition time as digitized by the comparator input. Rev. B | Page 4 of 14 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TIMING INFORMATION APPLICATIONS INFORMATION CLOCK TIMING RECOVERY OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE