Datasheet AD8465 (Analog Devices) - 9

Data Sheet AD8465 350 0.44 0.43 300 +125°C 0.42 250 ) V V) +25°C G ( 0.41 S (m 200 WIN ESI 0.40 T S ER U 150 TP 0.39 YST H OU 100 0.38 –40°C 50 0.37 0 0.36 0 –2 –4 –6 –8 –10 –12 –14 –16 –18
010
2.4 3.4 4.4 5.4
013
LE/HYS PIN CURRENT (µA) VCCO (V)
07958- 07958- Figure 10. Hysteresis vs. LE/HYS Pin Current Figure 13. LVDS Output Swing vs. VCCO
3.5 1.425V 3.0 Q s) n ( AY L 2.5 N DE IO AT 2.0 AG P PROPAGATION DELAY RO P 1.5 Q 1.0 0 10 20 30 40 50 60 70 80 90 100
011 014
OVERDRIVE (mV) 925.0mV 1.000ns/DIV
07958- 07958- Figure 11. Propagation Delay vs. Input Overdrive Figure 14. 50 MHz Output Voltage Waveform at VCCO = 2.5 V
1.6 PROPAGATION 1.543V Q s) DELAY RISE ns n ( 1.5 AY L N DE IO PROPAGATION AT DELAY FALL ns AG 1.4 P RO P 1.3 Q –0.6 –0.2 0.2 0.6 1.0 1.4 1.8 2.2 2.6 3.0
012 015
VCM AT VCC = 2.5V (V) 1.043V 1.000ns/DIV
07958- 07958- Figure 12. Propagation Delay vs. Input Common-Mode Voltage Figure 15. 50 MHz Output Voltage Waveform at VCCO = 5.5 V Rev. B | Page 9 of 14 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS TIMING INFORMATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATION INFORMATION POWER/GROUND LAYOUT AND BYPASSING LVDS-COMPATIBLE OUTPUT STAGE USING/DISABLING THE LATCH FEATURE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS CROSSOVER BIAS POINTS MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS