Datasheet AD8469 (Analog Devices) - 10
| Hersteller | Analog Devices |
| Beschreibung | Fast, Rail-to-Rail, Low Power, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
| Seiten / Seite | 12 / 10 — AD8469. Data Sheet. MINIMUM INPUT SLEW RATE REQUIREMENT |
| Dateiformat / Größe | PDF / 264 Kb |
| Dokumentensprache | Englisch |
AD8469. Data Sheet. MINIMUM INPUT SLEW RATE REQUIREMENT
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AD8469 Data Sheet MINIMUM INPUT SLEW RATE REQUIREMENT
With additional capacitive loading or poor bypassing, oscillation With the rated load capacitance and normal good PCB design may be encountered. These oscillations are due to the high gain (see the Power/Ground Layout and Bypassing section), the bandwidth of the comparator in combination with feedback AD8469 comparator should be stable at any input slew rate with through parasitics in the package and PCB. In many applications, no hysteresis. Broadband noise from the input stage is observed chatter is not harmful. in place of the excessive chatter that is seen with most other high speed comparators. Rev. 0 | Page 10 of 12 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Applications Information Power/Ground Layout and Bypassing TTL-/CMOS-Compatible Output Stage Optimizing Performance Comparator Propagation Delay Dispersion Comparator Hysteresis Crossover Bias Point Minimum Input Slew Rate Requirement Typical Applications Circuits Outline Dimensions Ordering Guide Automotive Products
AD8469 Data Sheet MINIMUM INPUT SLEW RATE REQUIREMENT
With additional capacitive loading or poor bypassing, oscillation With the rated load capacitance and normal good PCB design may be encountered. These oscillations are due to the high gain (see the Power/Ground Layout and Bypassing section), the bandwidth of the comparator in combination with feedback AD8469 comparator should be stable at any input slew rate with through parasitics in the package and PCB. In many applications, no hysteresis. Broadband noise from the input stage is observed chatter is not harmful. in place of the excessive chatter that is seen with most other high speed comparators. Rev. 0 | Page 10 of 12 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Electrical Characteristics Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Applications Information Power/Ground Layout and Bypassing TTL-/CMOS-Compatible Output Stage Optimizing Performance Comparator Propagation Delay Dispersion Comparator Hysteresis Crossover Bias Point Minimum Input Slew Rate Requirement Typical Applications Circuits Outline Dimensions Ordering Guide Automotive Products