Datasheet ADCMP563, ADCMP564 (Analog Devices) - 4

ADCMP563/ADCMP564 Data Sheet Parameter Symbol Conditions Min Typ Max Unit
AC PERFORMANCE (Continued) Equivalent Input Rise Time Bandwidth1 BWEQ 0 V to 1 V swing, 2 V/ns 1500 MHz Maximum Toggle Rate >50% output swing, 50% duty cycle 800 MHz Minimum Pulse Width PWMIN ΔtPD < 25 ps 700 ps RMS Random Jitter VOD = 400 mV, 1.3 V/ns, 312 MHz, 1.0 ps 50% duty cycle Unit to Unit Propagation Delay Skew 100 ps POWER SUPPLY Positive Supply Current IVCC @ +5.0 V 2 3.2 5 mA Negative Supply Current IVEE @ −5.2 V 10 19 25 mA Positive Supply Voltage VCC Dual 4.75 5.0 5.25 V Negative Supply Voltage VEE Dual −4.96 −5.2 −5.45 V Power Dissipation PD Dual, without load 90 120 150 mW Dual, with load 150 180 230 mW DC Power Supply Rejection Ratio—VCC PSRRVCC 85 dB DC Power Supply Rejection Ratio—VEE PSRRVEE 85 dB HYSTERESIS (ADCMP564 Only) Hysteresis RHYS = 23.5 kΩ 20 mV RHYS = 9.0 kΩ 70 mV Hysteresis Pin Bias Voltage Referred to AGND −1 V Hysteresis Pin Series Resistance 3 kΩ 1 Equivalent input rise time bandwidth assumes a first-order input response and is calculated by the following formula: BW 2 2 EQ = 0.22/√(trCOMP – trIN ), where trIN is the 20/80 input transition time applied to the comparator and trCOMP is the effective transition time, as digitized by the comparator input. Rev. D | Page 4 of 15 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAMS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CONSIDERATIONS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TIMING INFORMATION APPLICATION INFORMATION CLOCK TIMING RECOVERY OPTIMIZING HIGH SPEED PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE