Datasheet ADCMP603 (Analog Devices) - 9
| Hersteller | Analog Devices |
| Beschreibung | Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator |
| Seiten / Seite | 16 / 9 — Data Sheet. ADCMP603. s) (n. AY L. N DE. IO AT AG P. RO P. 10 20 30 40 50 … |
| Revision | A |
| Dateiformat / Größe | PDF / 321 Kb |
| Dokumentensprache | Englisch |
Data Sheet. ADCMP603. s) (n. AY L. N DE. IO AT AG P. RO P. 10 20 30 40 50 60 70 80 90 100 110 120 130 140. 500mV/DIV. M2.00ns
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Textversion des Dokuments
Data Sheet ADCMP603 8 7 s) (n 6 AY L N DE 5 IO AT AG P 4 RO P 3
09 0 5- 24 0 91 5-
2
05 91
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140
05
500mV/DIV M2.00ns OVERDRIVE (mV)
Figure 10. Propagation Delay vs. Input Overdrive Figure 12. 50 MHz Output Voltage Waveform at VCCO = 2.5 V
4.0 VCC = 2.5V 3.8 s) 3.6 n ( PROP DELAY RISE ns Y A L DE 3.4 PROP DELAY FALL ns 3.2
08 0 5- 5 91 02
3.0
05 5-
–0.6 0 0.6 1.2 1.8 2.4 3.0
91 05
COMMON-MODE VOLTAGE (V) 1.00V/DIV M2.00ns
Figure 11. Propagation Delay vs. Input Common Mode Figure 13. 50 MHz Output Voltage Waveform at VCCO = 5.5 V Rev. A | Page 9 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS TIMING INFORMATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING TTL-/CMOS-COMPATIBLE OUTPUT STAGE USING/DISABLING THE LATCH FEATURE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS CROSSOVER BIAS POINT MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE
09 0 5- 24 0 91 5-
2
05 91
0 10 20 30 40 50 60 70 80 90 100 110 120 130 140
05
500mV/DIV M2.00ns OVERDRIVE (mV)
Figure 10. Propagation Delay vs. Input Overdrive Figure 12. 50 MHz Output Voltage Waveform at VCCO = 2.5 V
4.0 VCC = 2.5V 3.8 s) 3.6 n ( PROP DELAY RISE ns Y A L DE 3.4 PROP DELAY FALL ns 3.2
08 0 5- 5 91 02
3.0
05 5-
–0.6 0 0.6 1.2 1.8 2.4 3.0
91 05
COMMON-MODE VOLTAGE (V) 1.00V/DIV M2.00ns
Figure 11. Propagation Delay vs. Input Common Mode Figure 13. 50 MHz Output Voltage Waveform at VCCO = 5.5 V Rev. A | Page 9 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS TIMING INFORMATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING TTL-/CMOS-COMPATIBLE OUTPUT STAGE USING/DISABLING THE LATCH FEATURE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION COMPARATOR HYSTERESIS CROSSOVER BIAS POINT MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE