Data SheetADCMP608PIN CONFIGURATION AND FUNCTION DESCRIPTIONSQ16VCCADCMP608VEE 2TOP VIEW5SDN(Not to Scale)V 002 P34VN 06769- Figure 2. Pin Configuration Table 4. ADCMP608 Pin Function Descriptions Pin No.Mnemonic Description 1 Q Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater than the analog voltage at the inverting input, VN. 2 VEE Negative Supply Voltage. 3 VP Noninverting Analog Input. 4 VN Inverting Analog Input. 5 SDN Shutdown. Drive this pin low to shut down the device. 6 VCC VCC Supply. Rev. B | Page 5 of 10 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION POWER/GROUND LAYOUT AND BYPASSING TTL-/CMOS-COMPATIBLE OUTPUT STAGE OPTIMIZING PERFORMANCE COMPARATOR PROPAGATION DELAY DISPERSION CROSSOVER BIAS POINT MINIMUM INPUT SLEW RATE REQUIREMENT TYPICAL APPLICATION CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE