Datasheet ADF4602 (Analog Devices) - 5

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ADF4602 Parameter Min Typ Max Unit Test Conditions
RF Specifications (Low Band) Carrier Frequency 824 960 MHz Output Impedance 50 Ω Output Power (POUT) −6 dBm TM1 signal 64 DPCH Output Noise Spectral Density −158 dBc/Hz 45 MHz offset Carrier Leakage −35 dBc POUT = −6 dBm FDD EVM 5 % POUT = −6 dBm FDD ACLR 55 dB ±5 MHz, POUT = −6 dBm 70 dB ±10 MHz, POUT = −6 dBm RECEIVE SECTION Baseband I/Q Output Output Common Mode Voltage 1.15 1.2 1.35 V Mode 1 1.35 1.4 1.55 V Mode 2 Differential Output Range 4 V p-p d Output DC Offset ±5 mV Quadrature Gain Error 0.3 0.7 dB Quadrature Phase Error 1 °rms In-Band Gain Ripple 0.2 dB Low-Pass Filter Rejection (Check) WCDMA (Seventh Order) 20 dB @2.7 MHz 42 dB @3.5 MHz 80 dB @5.9 MHz 110 dB @10 MHz WCDMA (Fifth Order) 14 dB @2.7 MHz 31 dB @3.5 MHz 55 dB @5.9 MHz 80 dB @10 MHz GSM 12 dB @200 kHz 47 dB @400 kHz 90 dB @800 kHz Differential Group Delay WCDMA 250 ns 1.92 MHz band GSM 200 ns 100 kHz band Receiver Gain Control Maximum Voltage Gain 102 dB WCDMA mode Gain Control Range 90 dB Gain Control Resolution 1 dB Gain Control Step Error ±1 dB 1 dB step ±2 dB 10 dB step RF Specifications (High Band) Input Frequency 1710 2170 MHz Input Impedance 50 Ω Input Return Loss −20 dB Noise Figure 4.0 dB TX power of −8 dBm, spur-free measurement2 Maximum Input Power3 −20 dBm Maximum LNA gain −2 dBm Minimum LNA gain Input IP3 −7 dBm ±10 MHz and ±20 MHz Offset, 59 dB gain 0 85 MHz and 190 MHz Offset, 59 dB gain Input IP2 53 dBm 80 MHz offset 65 dBm 190 MHz offset EVM 8 % −60 dBm input RF Specifications (Low Band) Rev. A | Page 5 of 36 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION TRANSMITTER DESCRIPTION I/Q Baseband I/Q Modulator VCO Output TX Output Baluns DACS GENERAL PURPOSE OUTPUTS RECEIVER DESCRIPTION LNAs Mixers Baseband Section Gain Control DC Offset Compensation POWER MANAGEMENT FREQUENCY SYNTHESIS Reference Path SERIAL PORT INTERFACE (SPI) Format OPERATION AND TIMING Read REGISTERS REGISTER MAP REGISTER DESCRIPTION SOFTWARE INITIALIZATION PROCEDURE INITIALIZATION SEQUENCE Nonvolatile Memory (NVM) Initialization Programming Transmit and Receive frequencies APPLICATIONS INFORMATION INTERFACING THE ADF4602 TO THE AD9963 AD9963 ADC Inputs Interfacing to the AD9963 Rx Baseband Inputs AD9963 DAC Outputs Reference Voltage Current Scaling Resistor, RSET Gain Scaling Parameters RECEIVE SENSITIVITY Interfacing to the AD9963 TX Baseband Outputs OUTLINE DIMENSIONS ORDERING GUIDE