Datasheet LTM4643 (Analog Devices) - 10

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APPLICATIONS INFORMATION
The typical LTM4643 application circuit is shown in the FB and COMP pins together for each paralleled output Figure  29. External component selection is primarily with a single resistor to GND as determined by: determined by the input voltage, the output voltage and   the maximum load current. Refer to Table 6 for specific 60.4k   external capacitor requirements for a particular application.  N R  FB =  V   OUT 
V
 – 1
IN to VOUT Step-Down Ratios
 0.6  There are restrictions in the maximum VIN and VOUT step- down ratio that can be achieved for a given input voltage
Input Decoupling Capacitors
due to the minimum off-time and minimum on-time limits of each regulator. The minimum off-time limit imposes a The LTM4643 module should be connected to a low AC- maximum duty cycle which can be calculated as: impedance DC source. For each regulator channel, a 10µF input ceramic capacitor is recommended for RMS ripple DMAX = 1 – tOFF(MIN) • fSW current decoupling. A bulk input capacitor is only needed where t when the input source impedance is compromised by long OFF(MIN) is the minimum off-time, 70ns typical for LTM4643, and f inductive leads, traces or not enough source capacitance. SW is the switching frequency. Conversely the minimum on-time limit imposes a minimum duty cycle The bulk capacitor can be an electrolytic aluminum capaci- of the converter which can be calculated as: tor or polymer capacitor. DMIN = tON(MIN) • fSW Without considering the inductor ripple current, the RMS current of the input capacitor can be estimated as: where tON(MIN) is the minimum on-time, 40ns typical for LTM4643. In the rare cases where the minimum duty I I OUT(MAX) CIN(RMS) = • D • (1− D) cycle is surpassed, the output voltage will still remain η% in regulation, but the switching frequency will decrease from its programmed value. Note that additional thermal where η% is the estimated efficiency of the power module. derating may be applied. See the Thermal Considerations and Output Current Derating section in this data sheet.
Output Decoupling Capacitors
With an optimized high frequency, high bandwidth design,
Output Voltage Programming
only single piece of low ESR output ceramic capacitor is The PWM controller has an internal 0.6V reference voltage. required for each regulator channel to achieve low output As shown in the Block Diagram, a 60.4k internal feedback voltage ripple and very good transient response. Additional resistor connects each regulator channel from VOUT pin to output filtering may be required by the system designer, FB pin. Adding a resistor RFB from FB pin to GND programs if further reduction of output ripples or dynamic transient the output voltage: spikes is required. Table 6 provides a reference matrix show- ing transient performance for different output capacitor con- 60.4k RFB = figurations. Multiphase operation will reduce effective out- VOUT − 1 put ripple as a function of the number of phases. Application 0.6 Note 77 discusses this noise reduction versus output ripple current cancellation, but the output capacitance will be
Table 1. VFB Resistor Table vs Various Output Voltages
more a function of stability and transient response. The
VOUT (V) 0.6 1.0 1.2 1.5 1.8 2.5 3.3
LTpowerCAD® Design Tool is available to download online RFB (k) Open 90.9 60.4 40.2 30.1 19.1 13.3 for output ripple, stability and transient response analysis For parallel operation of N channels, use the following and calculating the output ripple reduction as the number equation can be used to solve for RFB. Tie the VOUT and of phases implemented increases by N times. Rev D 10 For more information www.analog.com Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Decoupling Requirements Operation Applications Information Typical Applications Package Description Package Photo Related Parts