Datasheet KSZ8993M (Microchip) - 7

HerstellerMicrochip
BeschreibungIntegrated 3-Port 10/100 Managed Switch with PHYs
Seiten / Seite74 / 7 — KSZ8993M. TABLE 2-1:. SIGNALS (CONTINUED). Pin. Pin Name. Type. …
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KSZ8993M. TABLE 2-1:. SIGNALS (CONTINUED). Pin. Pin Name. Type. Description. Number. Note:

KSZ8993M TABLE 2-1: SIGNALS (CONTINUED) Pin Pin Name Type Description Number Note:

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KSZ8993M TABLE 2-1: SIGNALS (CONTINUED) Pin Pin Name Type Description Number
1 = Enable auto negotiation on port 2 13 P2ANEN IPU 0 = Disable auto negotiation on port 2 1 = Force port 2 to 100BT if P2ANEN = 0 14 P2SPD IPD 0 = Force port 2 to 10BT if P2ANEN =0 1 = Port 2 default to full-duplex mode if P2ANEN = 1 and auto negotiation fails. Force port 2 in full-duplex mode if P2ANEN = 0. 15 P2DPX IPD 0 = Port 2 default to half-duplex mode if P2ANEN = 1 and auto negotiation fails. Force port 2 in half-duplex mode if P2ANEN = 0. 1 = Always enable (force) port 2 flow control feature 16 P2FFC IPD 0 = Port 2 flow control feature enable is determined by auto negotiation result. 17 NC OPU No connect 18 NC IPD No connect 19 NC IPD No connect Port 2 LED indicator 20 P2LED3 OPD
Note:
Internal pull-down is weak; it will not turn on the LED. See description for pin 4. 21 DGND GND Digital ground VDDC: For KSZ8993M, this is an input power pin for the 1.8V digital core V VDDC/ DD. 22 P VOUT_1V8: For KSZ8993ML, this is a 1.8V output power pin to supply VOUT_1V8 the KSZ8993ML’s input power pins: VDDAP (pin 63), VDDC (pins 91 and 123), and VDDA (pins 38, 43, and 57). LED display mode select 23 LEDSEL1 IPD See description for pins 1 and 4. 24 NC O No connect Port 1 LED indicator
Note:
An external 1 kΩ pull-down is needed on this pin if it is 25 P1LED3 OPD connected to a LED. The 1 kΩ resistor will not turn on the LED. See description for pin 1. 26 NC O No connect Hardware pin overwrite 0 = Disable. All strap-in pins configurations are overwritten by the EEPROM configuration data. 27 HWPOVR IPD 1 = Enable. All strap-in pins configurations are overwritten by the EEPROM configuration data, except for register 0x2C bits [7:5], (port 2: auto-negotiation enable, force speed, force duplex). Port 2 Auto MDI/MDI-X 28 P2MDIXDIS IPD PD (default) = Enable PU = Disable Port 2 MDI/MDI-X setting when auto MDI/MDI-X is disabled. 29 P2MDIX IPD PD (default) = MDI-X (transmit on TXP2/TXM2 pins) PU = MDI, (transmit on RXP2/RXM2 pins) 1 = Enable auto negotiation on port 1 30 P1ANEN IPU 0 = Disable auto negotiation on port 1 1 = Force port 1 to 100BT if P1ANEN = 0 31 P1SPD IPD 0 = Force port 1 to 10BT if P1ANEN = 0  2019 Microchip Technology Inc. DS00003066A-page 7 Document Outline 1.0 Introduction 1.1 General Description 2.0 Pin Description and Configuration 3.0 Functional Description 3.1 Physical Layer Transceiver 3.2 MAC and Switch 3.3 Advanced Switch Functions 3.4 Configuration Interface 3.5 Loopback Support 4.0 Register Descriptions 4.1 MII Management (MIIM) Registers 4.2 Register Descriptions 4.3 Register Map: Switch and PHY (8-bit registers) 4.4 Register Descriptions 4.5 Advanced Control Registers (Registers 96-127) 4.6 Static MAC Address Table 4.7 VLAN Table 4.8 Dynamic MAC Address Table 4.9 Management Information Base (MIB) Counters 5.0 Operational Characteristics 5.1 Absolute Maximum Ratings* 5.2 Operating Ratings** 6.0 Electrical Characteristics 7.0 Timing Specifications 7.1 EEPROM Timing 7.2 SNI Timing 7.3 MAC Mode MII Timing 7.4 PHY Mode MII Timing 7.5 SPI Timing 7.6 Reset Timing 8.0 Reset Circuit 9.0 Selection of Isolation Transformers 10.0 Package Outline 10.1 Package Marking Information Appendix A: Data Sheet Revision History The Microchip Website Customer Change Notification Service Customer Support Product Identification System Worldwide Sales and Service