Datasheet ES8311 (Everest Semiconductor) - 3

Everest Semiconductor Confidential ES8311 2. PIN OUT AND DESCRIPTION
M IC1 P/DM CD IC_ M VM I A S C CE T DA 1N I A D 20 19 18 17 16 CCLK 1 15 ADCVREF MCLK 2 14 DACVREF PVDD 3 ES8311 13 OUTN DVDD 4 12 OUTP DGND 5 11 AVDD 10 6 7 8 9 S ASD LR DS A CLK GND CK DI OU / N D M T IC_ SCL
Pin Name Pin number Input or Output Pin Description
CCLK, CDATA, CE 1, 19, 20 I, I/O, I I2C clock, data, address MCLK 2 I Master clock SCLK/DMIC_SCL 6 I/O Serial data bit clock/DMIC bit clock LRCK 8 I/O Serial data left and right channel frame clock ASDOUT 7 O ADC serial data output DSDIN 9 I DAC serial data input MIC1P/DMIC_SDA 18 MIC1N 17 I Mic input OUTP, OUTN 12, 13 O Differential analog output PVDD 3 Analog Power supply for the digital input and output DVDD, DGND 4, 5 Analog Digital power supply AVDD, AGND 11, 10 Analog Analog power supply VMID 16 Analog Filtering capacitor connection ADCVREF, DACVREF 15, 14 Analog Filtering capacitor connection Revision 7.0 3 January 2020 Latest datasheet: www.everest-semi.com or info@everest-semi.com Document Outline Block Diagram Pin Out and Description typical APPLICATION CIRCUIT Clock Modes and Sampling Frequencies Micro-controller configuration Interface Digital Audio Interface ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Recommended Operating Conditions ADC Analog and Filter Characteristics and Specifications DAC Analog and Filter Characteristics and Specifications DC Characteristics Serial Audio Port Switching Specifications I2C Switching Specifications (slow speed mode/high speed mode) Package CORPORATe INFORMATION