Datasheet ADAU1328 (Analog Devices) - 9

Data Sheet ADAU1328 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS N P N P DD DD AV LF ADC2RN ADC2RP ADC2L ADC2L ADC1RN ADC1RP ADC1L ADC1L CM AV 48 47 46 45 44 43 42 41 40 39 38 37 AGND 1 36 AGND MCLKI/XI 2 35 FILTR MCLKO/XO 3 34 AGND AGND 4 33 AVDD AVDD 5 32 AGND ADAU1328 OL3 6 31 TOP VIEW OR2 (Not to Scale) OR3 7 30 OL2 SINGLE-ENDED OL4 8 OUTPUT 29 OR1 OR4 9 28 OL1 PD/RST 10 27 CLATCH/ADR1 DSDATA4 11 26 CCLK/SCL DGND 12 25 DGND 13 14 15 16 17 18 19 20 21 22 23 24 K K K K DD A3 A2 A1 A2 A1 DA DV RCL RCL ADR0 /S DAT DAT DAT DBCL DAT DAT ABCL
020
DL AL N/ UT DS DS DS AS AS CI CO
06102- Figure 2. Pin Configuration
Table 9. Pin Function Description Pin No. In/Out Mnemonic Description
1 I AGND Analog Ground. 2 I MCLKI/XI Master Clock Input/Crystal Oscillator Input. 3 O MCLKO/XO Master Clock Output/Crystal Oscillator Output. 4 I AGND Analog Ground. 5 I AVDD Analog Power Supply. Connect to analog 3.3 V supply. 6 O OL3 DAC 3 Left Output. 7 O OR3 DAC 3 Right Output. 8 O OL4 DAC 4 Left Output. 9 O OR4 DAC 4 Right Output. 10 I PD/RST Power-Down Reset (Active Low). 11 I/O DSDATA4 DAC Serial Data Input 4. Data input to DAC4 data in/TDM DAC2 data out (dual-line mode)/AUX DAC2 data out (to external DAC2). 12 I DGND Digital Ground. 13 I DVDD Digital Power Supply. Connect to digital 3.3 V supply. 14 I/O DSDATA3 DAC Serial Data Input 3. Data input to DAC3 data in/TDM DAC2 data in (dual-line mode)/AUX ADC2 data in (from external ADC2). 15 I/O DSDATA2 DAC Serial Data Input 2. Data input to DAC2 data in/TDM DAC data out/AUX ADC1 data in (from external ADC1). 16 I DSDATA1 DAC Serial Data Input 1. Data input to DAC1 data in/TDM DAC data in/TDM data in. 17 I/O DBCLK Bit Clock for DACs. 18 I/O DLRCLK LR Clock for DACs. 19 I/O ASDATA2 ADC Serial Data Output 2. Data output from ADC2/TDM ADC data in/AUX DAC1 data out (to external DAC1). 20 O ASDATA1 ADC Serial Data Output 1. Data output from ADC1/TDM ADC data out/TDM data out. 21 I/O ABCLK Bit Clock for ADCs. 22 I/O ALRCLK LR Clock for ADCs. Rev. B | Page 9 of 32 Document Outline Features Applications General Description Functional Block Diagram Table of Contents Revision History Specifications Test Conditions Analog Performance Specifications Crystal Oscillator Specifications Digital Input/Output Specifications Power Supply Specifications Digital Filters Timing Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Analog-to-Digital Converters (ADCs) Digital-to-Analog Converters (DACs) Clock Signals Reset and Power-Down Serial Control Port Power Supply and Voltage Reference Serial Data Ports—Data Format Time-Division Multiplexed (TDM) Modes Daisy-Chain Mode Control Registers Definitions PLL and Clock Control Registers DAC Control Registers ADC Control Registers Additional Modes Application Circuits Outline Dimensions Ordering Guide