Datasheet BLP05H9S500P (Ampleon) - 5

BLP05H9S500P Power LDMOS transistor 7.4 Graphical data
amp00945 amp00964 27 80 27 80 Gp G ηD Gp G ηD (dB) (dB) (dB) (%) (%) (%) (1) (1) (1) (dB) (dB) (dB) (%) (%) (%) (1) (1) (1) (2) (2) (2) (2) (2) (2) 26 (3) (3) (3) 70 26 (3) (3) (3) 70 25 60 25 60 Gp G (1) (1) (1) Gp G (1) (1) (1) (2) (2) (2) (2) (2) (2) (3) (3) (3) (3) (3) (3) 24 50 24 50 23 40 23 40 ηD ηD 22 30 22 30 0 100 200 300 400 500 600 0 100 200 300 400 500 600 PL (W) PL (W) VDS = 50 V; IDq = 50 mA; CW. VDS = 50 V; IDq = 50 mA; CW pulsed; tp = 100 s; (1) f = 423 MHz  = 10 %. (2) f = 433 MHz (1) f = 423 MHz (3) f = 443 MHz (2) f = 433 MHz (3) f = 443 MHz
Fig 3. Power gain and drain efficiency as function of Fig 4. Power gain and drain efficiency as function of output power; typical values output power; typical values
BLP05H9S500P All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2019. All rights reserved.
Product data sheet Rev. 1 — 10 September 2019 5 of 13
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Test information 7.1 Ruggedness in class-AB operation 7.2 Impedance information 7.3 Application circuit 7.4 Graphical data 8. Package outline 9. Handling information 10. Abbreviations 11. Revision history 12. Legal information 12.1 Data sheet status 12.2 Definitions 12.3 Disclaimers 12.4 Trademarks 13. Contact information 14. Contents