Datasheet TCKE805 (Toshiba) - 8
| Hersteller | Toshiba |
| Beschreibung | CMOS Linear Integrated Circuit Silicon Monolithic. 18 V, 5A eFuse IC with Adjustable Over Current Protection and Reverse Blocking FET Control |
| Seiten / Seite | 22 / 8 — TCKE805 Series. Application Note. 1. Application circuit example. 1) … |
| Dateiformat / Größe | PDF / 996 Kb |
| Dokumentensprache | Englisch |
TCKE805 Series. Application Note. 1. Application circuit example. 1) Peripheral circuits
Modelllinie für dieses Datenblatt
TCKE805NA
TCKE805NL
Textversion des Dokuments
TCKE805 Series Application Note 1. Application circuit example
C IN COUT 1 μF 1 μF CdV/dT RILIM 120 pF 36 kΩ (ILIM=3A)
1) Peripheral circuits
Connect the power supply to the input terminal VIN. During normal operation, almost the same voltage as the VIN voltage is output from the output terminal VOUT through the internal MOSFET. If the current suddenly decreases, for example, when short-circuiting or overcurrent is protected, high-spike voltages may be generated due to back electromotive force of inductance components such as wirings connected to the input/output terminals of the eFuse IC, causing damage to the eFuse IC and resulting damage. In this case, a positive spike voltage is generated on the input side and a negative spike voltage is generated on the output side. When designing boards, design patterns so that the length of the wires on the input-side and output-side of the eFuse IC is as short as possible. Also, the GND wiring area should be as wide as possible to reduce the impedance. CIN functions to suppress the peak value against the positive spike voltage generated by the inputs. The peak value VSPIKE of the spike voltage and the capacitance value of the CIN have the following relationships. It can be understood that the spike voltage can be reduced by increasing the CIN. L IN: effective inductance component of the input terminal (H), I OUT: output current (A) V SPIKE: peak value of spiked voltage generated (V), V IN: power supply voltage during normal operation (V) Toshiba eFuse IC recommends 1 μF for CIN and COUT, and in most cases this volume is effective enough. Be sure to measure it on the actual PCB board. In order to prevent damage due to spike voltage, it is also recommended to connect a TVS diode (ESD protection diode) to the input terminal and a SBD (Schottky barrier diode) to the output terminal. TVS diodes are also effective in preventing surge damage caused by external noises input from power supplies and GND wires. In addition to protecting the eFuse IC, TVS diodes are also effective in preventing damage to ICs and devices on the load side. For eFuse IC use, connect between the input terminal and GND. For negative spike voltage generated on the output side, an SBD can be connected to prevent the output potential from dropping more than GND. This protects not only the eFuse IC but also the ICs and devices connected as loads. Connect the SBD with the GND as the anode between the output terminal of the eFuse IC and the GND. As noted above, TVS diodes and SBDs are recommended for eFuse IC because they can provide more robust protective features. The diagram below shows the peripheral circuit diagram when a TVS diode and an SBD are added. 8 2019-11-8 © 2019 Toshiba Electronic Devices & Storage Corporation
C IN COUT 1 μF 1 μF CdV/dT RILIM 120 pF 36 kΩ (ILIM=3A)
1) Peripheral circuits
Connect the power supply to the input terminal VIN. During normal operation, almost the same voltage as the VIN voltage is output from the output terminal VOUT through the internal MOSFET. If the current suddenly decreases, for example, when short-circuiting or overcurrent is protected, high-spike voltages may be generated due to back electromotive force of inductance components such as wirings connected to the input/output terminals of the eFuse IC, causing damage to the eFuse IC and resulting damage. In this case, a positive spike voltage is generated on the input side and a negative spike voltage is generated on the output side. When designing boards, design patterns so that the length of the wires on the input-side and output-side of the eFuse IC is as short as possible. Also, the GND wiring area should be as wide as possible to reduce the impedance. CIN functions to suppress the peak value against the positive spike voltage generated by the inputs. The peak value VSPIKE of the spike voltage and the capacitance value of the CIN have the following relationships. It can be understood that the spike voltage can be reduced by increasing the CIN. L IN: effective inductance component of the input terminal (H), I OUT: output current (A) V SPIKE: peak value of spiked voltage generated (V), V IN: power supply voltage during normal operation (V) Toshiba eFuse IC recommends 1 μF for CIN and COUT, and in most cases this volume is effective enough. Be sure to measure it on the actual PCB board. In order to prevent damage due to spike voltage, it is also recommended to connect a TVS diode (ESD protection diode) to the input terminal and a SBD (Schottky barrier diode) to the output terminal. TVS diodes are also effective in preventing surge damage caused by external noises input from power supplies and GND wires. In addition to protecting the eFuse IC, TVS diodes are also effective in preventing damage to ICs and devices on the load side. For eFuse IC use, connect between the input terminal and GND. For negative spike voltage generated on the output side, an SBD can be connected to prevent the output potential from dropping more than GND. This protects not only the eFuse IC but also the ICs and devices connected as loads. Connect the SBD with the GND as the anode between the output terminal of the eFuse IC and the GND. As noted above, TVS diodes and SBDs are recommended for eFuse IC because they can provide more robust protective features. The diagram below shows the peripheral circuit diagram when a TVS diode and an SBD are added. 8 2019-11-8 © 2019 Toshiba Electronic Devices & Storage Corporation