Datasheet TCKE805 (Toshiba) - 7

HerstellerToshiba
BeschreibungCMOS Linear Integrated Circuit Silicon Monolithic. 18 V, 5A eFuse IC with Adjustable Over Current Protection and Reverse Blocking FET Control
Seiten / Seite22 / 7 — TCKE805 Series. TCKE805 AC Characteristics (Unless otherwise specified, …
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TCKE805 Series. TCKE805 AC Characteristics (Unless otherwise specified, Ta = -40 to 85°C, VIN = 5V, RILIM = 20k. , RLOAD=5

TCKE805 Series TCKE805 AC Characteristics (Unless otherwise specified, Ta = -40 to 85°C, VIN = 5V, RILIM = 20k , RLOAD=5

Modelllinie für dieses Datenblatt

TCKE805NA
TCKE805NL

Textversion des Dokuments

TCKE805 Series TCKE805 AC Characteristics (Unless otherwise specified, Ta = -40 to 85°C, VIN = 5V, RILIM = 20k

, RLOAD=5

, CIN = COUT = 1μF )
Characteristics Symbol Test Condition Min. Typ. Max. Unit V V EN↑ to IIN = 100 mA, 1 A resistive load at VOUT, OUT on time tON  330  µs CdV/dT = OPEN (Note5) VOUT off time tOFF VEN↓ to VEFET↓, CEFET = OPEN (Note5)  0.96  µs VEN↑ to VOUT become VIN* 90%, CdV/dT = OPEN µs (Note6) 200 400 700 Output ramp time tdV/dT VEN↑ to VOUT become VIN* 90%, CdV/dT = 1 nF  2.3  ms (Note5) Fast trip comparator delay tFastOffDly IOUT > IFASTTRIP to IOUT = 0 (Switch off) (Note5)  150  ns VEN↑ to VEFET = VIN, CEFET = 1 nF(Note5)  2.6  ms EFET on time tEFET-ON VEN↑ to VEFET = VIN, CEFET = 10 nF(Note5)  25  ms VEN↓ to VEFET = 1 V, CEFET = 1 nF(Note5)  1.2  µs EFET off time tEFET-OFF VEN↓ to VEFET = 1 V, CEFET = 10 nF(Note5)  2.9  µs Note5: This parameter is reference only. Note6: This parameter is warranted by design. 7 2019-11-8 © 2019 Toshiba Electronic Devices & Storage Corporation