Datasheet AD8305 (Analog Devices) - 3

Data Sheet AD8305 SPECIFICATIONS
VP = 5 V, VN = 0 V, TA = 25°C, RREF = 200 kΩ, and VRDZ connected to VREF, unless otherwise noted.
Table 1. Parameter Conditions Min Typ Max Unit
INPUT INTERFACE Pin 4, INPT, Pin 3, IREF Specified Current Range, IPD Flows toward INPT pin 10 nA 1 mA Input Current Min/Max Limits Flows toward INPT pin 10 mA Reference Current, IREF, Range Flows toward IREF pin 10 nA 1 mA Summing Node Voltage Internally preset; may be altered by the user 0.46 0.5 0.54 V Temperature Drift −40°C < TA < +85°C 0.015 mV/°C Input Offset Voltage VINPT − VSUM, VIREF − VSUM −20 +20 mV LOGARITHMIC OUTPUT Pin 9, VLOG Logarithmic Slope 190 200 210 mV/dec −40°C < TA < +85°C 185 215 mV/dec Logarithmic Intercept1 0.3 1 1.7 nA −40°C < TA < +85°C 0.1 2.5 nA Law Conformance Error 10 nA < IPD < 1 mA 0.1 0.4 dB Wideband Noise2 IPD > 1 µA 0.7 mV√Hz Small Signal Bandwidth2 IPD > 1 µA 0.7 MHz Maximum Output Voltage 1.7 V Minimum Output Voltage Limited by VN = 0 V 0.01 V Output Resistance 4.375 5 5.625 kΩ REFERENCE OUTPUT Pin 2, VREF Voltage With Reference to Ground 2.435 2.5 2.565 V −40°C < TA < +85°C 2.4 2.6 V Maximum Output Current Sourcing (grounded load) 20 mA Incremental Output Resistance Load current < 10 mA 2 Ω OUTPUT BUFFER Pin 10, BFIN; Pin 11, SCAL; Pin 12, VOUT Input Offset Voltage −20 +20 mV Input Bias Current Flowing out of Pin 10 or Pin 11 0.4 mA Incremental Input Resistance 35 MΩ Output Range RL = 1 kΩ to ground VP − 0.1 V Incremental Output Resistance Load current < 10 mA 0.5 Ω Peak Source/Sink Current 25 mA Small Signal Bandwidth GAIN = 1 15 MHz Slew Rate 0.2 V to 4.8 V output swing 15 V/µs POWER SUPPLY Pin 8, VPOS; Pin 6 and Pin 7, VNEG Positive Supply Voltage (VP − VN) ≤ 12 V 3 5 12 V Quiescent Current 5.4 6.5 mA Negative Supply Voltage (Optional) (VP − VN) ≤ 12 V −5.5 0 V 1 Other values of logarithmic intercept can be achieved by adjusting RREF. 2 Output noise and incremental bandwidth are functions of input current, measured using output buffer connected for GAIN = 1. Rev. C | Page 3 of 24 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics General Structure Theory Managing Intercept and Slope Response Time and Noise Considerations Power Supply Sequencing Applications Information Calibration Using a Negative Supply Log-Ratio Applications Reversing The Input Polarity Characterization Methods Evaluation Board Outline Dimensions Ordering Guide