link to page 14 Data SheetAD8305PIN CONFIGURATION AND FUNCTION DESCRIPTIONSMMMMMMMM16 CO15 CO14 CO13 COVRDZ 112 VOUTVREF 211 SCALAD8305TOP VIEWIREF 310 BFIN(Not to Scale)INPT 49 VLOG67M 5S 8EGEGVSUVNVNVPONOTES 002 1. THE EXPOSED PAD MUST BESOLDERED TO GROUND. 03053- Figure 2. Pin Configuration Table 3. Pin Function Descriptions Pin No.MnemonicFunction 1 VRDZ Top of a Resistive Divider Network that Offsets VLOG to Position the Intercept. Normal y connected to VREF; may also be connected to ground when bipolar outputs are to be provided. 2 VREF Reference Output Voltage of 2.5 V. 3 IREF Accepts (Sinks) Reference Current, IREF. 4 INPT Accepts (Sinks) Photodiode Current, IPD. Usually connected to photodiode anode such that photo current flows into INPT. 5 VSUM Guard Pin. Used to shield the INPT current line and for optional adjustment of the INPT and IREF node potential. 6, 7 VNEG Optional Negative Supply, VN (this pin is usually grounded; for details of usage, see the Applications section. 8 VPOS Positive Supply, (VP − VN ) ≤ 12 V. 9 VLOG Output of the Logarithmic Front End. 10 BFIN Buffer Amplifier Noninverting Input. 11 SCAL Buffer Amplifier Inverting Input. 12 VOUT Buffer Output. 13 to 16 COMM Analog Ground. EPAD The exposed pad must be soldered to ground. Rev. C | Page 5 of 24 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics General Structure Theory Managing Intercept and Slope Response Time and Noise Considerations Power Supply Sequencing Applications Information Calibration Using a Negative Supply Log-Ratio Applications Reversing The Input Polarity Characterization Methods Evaluation Board Outline Dimensions Ordering Guide