Datasheet 5X2503 (IDT) - 8

5X2503 Datasheet
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 5X2503. These ratings, which are standard values for IDT commercial y rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Table 8. Absolute Maximum Ratings Item Rating
Supply Voltage, VDD1_8, VDDOUTx 1.89V
Inputs
Other Inputs -0.5V to VDD1_8 / VDDOUTx Outputs, VDDOUTx (LVCMOS) -0.5V to VDDOUTx + 0.5V Outputs, IO (SDA) 10mA Package Thermal Impedance, ΘJA 42°C/W (0mps) Package Thermal Impedance, ΘJC 41.8°C/W (0mps) Storage Temperature, TSTG -65°C to 150°C ESD Human Body Model 2000V Junction Temperature 125°C
Recommended Operating Conditions Table 9. Recommended Operating Conditions Symbol Parameter Minimum Typical Maximum Units
VDDOUT1 Power Supply Voltage for Supporting OUT1 1.71 1.8 1.89 V VDDOUT1 Power Supply Voltage for Supporting OUT1 1.14 1.2 1.26 V VDDOUT2 Power Supply Voltage for Supporting OUT2/OUT3 1.71 1.8 1.89 V VDD1_8 Power Supply Voltage for Core Logic Functions 1.71 1.8 1.89 V TA Ambient Operating Temperature -40 — 85 °C CLOAD_OUT Maximum Load Capacitance (1.8V LVCMOS only) — 5 — pF tPU Power-up Time for all VDDs to reach Minimum Specified Voltage 0.05 — 3 ms (power ramps must be monotonic) ©2017 Integrated Device Technology, Inc 8 December 18, 2017 Document Outline Description Typical Applications Features Output Features Key Specifications Block Diagram Power Group Output Source Selection Register Setting Tables Pin Assignments Figure 1. Pin Assignments for 2.5 × 2.5 mm 12-DFN Package Pin Descriptions Table 1. Pin Descriptions Device Feature and Function DFC – Dynamic Frequency Control Figure 2. DFC Function Block Diagram Table 2. DFC Function Priority DFC Function Programming PPS – Proactive Power Saving Function Figure 3. PPS Function Block Diagram Figure 4. PPS Assertion/Deassertion Timing Chart PPS Function Programming Input Pin Function Table 3. OE1 Pin Function Table Table 4. SDA/SCL Function Selection Spread Spectrum ORT – VCO Overshoot Reduction Technology PLL Features and Descriptions Table 5. Output Divider 1 Table 6. Output Divider 2, 3, and 5 Table 7. Output Divider 4 Output Clock Test Conditions Figure 5. LVCMOS Output Clock Test Condition Absolute Maximum Ratings Table 8. Absolute Maximum Ratings Recommended Operating Conditions Table 9. Recommended Operating Conditions Input Capacitance, LVCMOS Output Impedance, and Internal Pull-down Resistance (TA = +25 °C) Table 10. Input Capacitance, LVCMOS Output Impedance, and Internal Pull-down Resistance Integrated Crystal Characteristics Table 11. Crystal Characteristics DC Electrical Characteristics Table 12. DC Electrical Characteristics 1,2 Electrical Characteristics–Input Parameters Table 13. Electrical Characteristics–Input Parameters 1 DC Electrical Characteristics for 1.8V LVCMOS Table 14. DC Electrical Characteristics – 1.8V LVCMOS AC Electrical Characteristics Table 15. AC Timing Electrical Characteristics – 32.768kHz Table 16. AC Timing Electrical Characteristics – 1.8V Table 17. AC Timing Electrical Characteristics, 1.2V / 1.8V I2C Bus DC Characteristics Table 18. I2C Bus DC Characteristics Table 19. I2C Bus AC Characteristics Spread Spectrum Generation Specifications Table 20. Spread Spectrum Generation Specifications General SMBus Serial Interface Information Package Outline Drawings Figure 6. NDG12 Package Drawing – page 1 Figure 7. NDG12 Package Drawing – page 2 Ordering Information Marking Diagram Revision History