Datasheet InnoSwitch3-EP (Power Integrations) - 10

InnoSwitch3-EP
reduce the output voltage ripples. Capacitor C8 provides noise This measured voltage should be used to select the components filtering of the signal at the FEEDBACK pin. Zener VR2 was added for required to achieve primary sensed OVP. It is recommended that a tighter cross-regulation to limit the 12 V output when it is unloaded. Zener diode with a clamping voltage approximately 6 V lower than the Resistors R3 and R4 provide line voltage sensing and provide a current bias winding rectified voltage at which OVP is expected to be to U1, which is proportional to the DC voltage across capacitor C3. At triggered be selected. A forward voltage drop of 1 V can be assumed approximately 100 VDC, the current through these resistors exceeds for the blocking diode. A small signal standard recovery diode is the line undervoltage threshold, which results in enabling of U1. At recommended. The blocking diode prevents any reverse current approximately 435 VDC, the current through these resistors exceeds discharging the bias capacitor during start-up. Final y, the value of the line over voltage threshold, which results in disabling of U1. the series resistor required can be calculated such that a current higher than I will flow into the PRIMARY BYPASS pin during an
Key Application Considerations
SD output overvoltage.
Output Power Table Reducing No-load Consumption
The data sheet output power table (Table 1) represents the maximum The InnoSwitch3-EP IC can start in self-powered mode, drawing practical continuous output power level that can be obtained under energy from the BYPASS pin capacitor charged through an internal the fol owing conditions: current source. Use of a bias winding is however required to provide supply current to the PRIMARY BYPASS pin once the InnoSwitch3-EP 1. The minimum DC input voltage is 90 V or higher for 85 VAC input, IC has started switching. An auxiliary (bias) winding provided on the 220 V or higher for 230 VAC input or 115 VAC with a voltage- transformer serves this purpose. A bias winding driver supply to the doubler. Input capacitor voltage should be sized to meet these PRIMARY BYPASS pin enables design of power supplies with no-load criteria for AC input designs. power consumption less than 15 mW. Resistor R6 shown in Figure 10 2. Efficiency assumptions depend on power level. Smallest device should be adjusted to achieve the lowest no-load input power. power level assumes efficiency >84% increasing to >89% for the largest device.
Secondary-Side Overvoltage Protection (Auto-Restart Mode)
3. Transformer primary inductance tolerance of ±10%. The secondary-side output overvoltage protection provided by the 4. Reflected output voltage (VOR) is set to maintain K = 0.8 at InnoSwitch3-EP IC uses an internal auto restart circuit that is P minimum input voltage for universal line and K = 1 for high input triggered by an input current exceeding a threshold of I into the P BPS(SD) line designs. SECONDARY BYPASS pin. The direct output sensed OVP function can 5. Maximum conduction losses for adapters is limited to 0.6 W, 0.8 W be realized by connecting a Zener diode from the output to the for open frame designs. SECONDARY BYPASS pin. The Zener diode voltage needs to be the 6. Increased current limit is selected for peak and open frame power difference between 1.25 × V and 4.4 V − the SECONDARY BYPASS OUT columns and standard current limit for adapter columns. pin voltage. It is necessary to add a low value resistor in series with 7. The part is board mounted with SOURCE pins soldered to a the OVP Zener diode to limit the maximum current into the sufficient area of copper and/or a heat sink to keep the SOURCE SECONDARY BYPASS pin. pin temperature at or below 110 °C.
Selection of Components
8. Ambient temperature of 50 °C for open frame designs and 40 °C for sealed adapters.
Components for InnoSwitch3-EP
9. Below a value of 1, K is the ratio of ripple to peak primary
Primary-Side Circuit
P current. To prevent reduced power delivery, due to premature
BPP Capacitor
termination of switching cycles, a transient K limit of ≥0.25 is P recommended. This prevents the initial current limit (I ) from A capacitor connected from the PRIMARY BYPASS pin of the INT being exceeded at Switch turn-on. InnoSwitch3-EP IC to GND provides decoupling for the primary-side control er and also selects current limit. A 0.47 mF or 4.7 mF capacitor
Primary-Side Overvoltage Protection (Latch-Off/
may be used. Though electrolytic capacitors can be used, often
Auto-Restart Mode)
surface mount multi-layer ceramic capacitors are preferred for use on Primary-side output overvoltage protection provided by the double sided boards as they enable placement of capacitors close to InnoSwitch3-EP IC uses an internal protection depending on H Code the IC. Their smal size also makes it ideal for compact power supplies. that is triggered by a threshold current of I into the PRIMARY 16 V or 25 V rated X5R or X7R dielectric capacitors are recommended SD BYPASS pin. In addition to an internal filter, the PRIMARY BYPASS pin to ensure that minimum capacitance requirements are met. capacitor forms an external filter helping noise immunity. For the
Bias Winding and External Bias Circuit
bypass capacitor to be effective as a high frequency filter, the The internal regulator connected from the DRAIN pin of the Switch to capacitor should be located as close as possible to the SOURCE and the PRIMARY BYPASS pin of the InnoSwitch3-EP primary-side PRIMARY BYPASS pins of the device. control er charges the capacitor connected to the PRIMARY BYPASS The primary sensed OVP function can be realized by connecting a pin to achieve start-up. A bias winding should be provided on the series combination of a Zener diode, a resistor and a blocking diode transformer with a suitable rectifier and filter capacitor to create a from the rectified and filtered bias winding voltage supply to the bias supply that can be used to supply at least 1 mA of current to the PRIMARY BYPASS pin. The rectified and filtered bias winding output PRIMARY BYPASS pin. voltage may be higher than expected (up to 1.5X or 2X the desired The turns ratio for the bias winding should be selected such that 7 V value) due to poor coupling of the bias winding with the output is developed across the bias winding at the lowest rated output winding and the resulting ringing on the bias winding voltage voltage of the power supply at the lowest load condition. If the waveform. It is therefore recommended that the rectified bias voltage is lower than this, no-load input power will increase. winding voltage be measured. This measurement should be ideal y done at the lowest input voltage and with highest load on the output.
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Rev. G 07/19 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description InnoSwitch3-EP Functional Description Primary Controller Secondary Controller Applications Example Key Application Considerations Selection of Components Components for InnoSwitch3-EP Primary-Side Circuit Components for InnoSwitch3-EP Secondary-Side Circuit Recommendations for Circuit Board Layout Layout Example Quick Design Checklist Absolute Maximum Ratings Thermal Resistance Typical Performance Curves InSOP-24D Package Drawing InSOP-24D Package Marking Part Ordering Table MSL Table ESD and Latch-Up Table Part Ordering Information