Datasheet InnoSwitch3-EP (Power Integrations) - 2

InnoSwitch3-EP DRAIN UNDER/OVER PRIMARY BYPASS (D) INPUT VOLTAGE (V) (BPP) PRIMARY BYPASS REGULATOR ENABLE ENABLE FAULT AUTO-RESTART PRIMARY GATE LINE COUNTER BYPASS PIN INTERFACE RESET BPP/UV UNDERVOLTAGE PRIMARY BPP/UV PRIM-CLK BYPASS PIN + CAPACITOR UV/OV SELECT AND - CURRENT VSHUNT OSCILLATOR/ LIMIT V GATE V TIMERS ILIM JITTER BP+ tON(MAX) tOFF(BLOCK) THERMAL GATE SHUTDOWN GATE PRIM/SEC OV/UV FAULT SecREQ BPP From SecPulse SenseFET Secondary PRIM/SEC Power Controller Q S MOSFET Q R DRIVER SEC- RECEIVER LATCH CONTROLLER BPP/UV I t LEB OFF(BLOCK) S ILIM PRIM-CLK + LATCH-OFF/ PRIMARY OVP V AUTO-RESTART LATCH/ ILIM - t AUTO-RESTART ON(MAX)
PI-8044g-041819
SOURCE (S)
Figure 3. Primary Controller Block Diagram.
FORWARD SYNCRONOUS RECTIFIER DRIVE OUTPUT VOLTAGE (FWD) (SR) (VOUT) SR CONTROL FORWARD REGULATOR INH 4.4 V ENABLE BPS SECONDARY VOUT SR UV BYPASS (BPS) + - DETECTOR 4.4 V S Q 3.9 V
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R Q SR THRESHOLD QR HANDSHAKE/ SECONDARY LATCH-OFF LATCH/ CONTROL INH AUTO-RESTART DCM To FEEDBACK Primary (FB) Receiver + FEEDBACK INH DRIVER - VREF QR FEEDBACK COMPENSATION TsMAX + - t VPK CONSTANT OFF(MIN) t POWER OSCILLATOR/ SECINH(MAX) TIMER IS THRESHOLD tSS(RAMP) SECONDARY ISENSE GROUND (IS) (GND)
PI-8045f-041819 Figure 4. Secondary Controller Block Diagram.
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Rev. G 07/19 www.power.com Document Outline Product Highlights Description Output Power Table Pin Functional Description InnoSwitch3-EP Functional Description Primary Controller Secondary Controller Applications Example Key Application Considerations Selection of Components Components for InnoSwitch3-EP Primary-Side Circuit Components for InnoSwitch3-EP Secondary-Side Circuit Recommendations for Circuit Board Layout Layout Example Quick Design Checklist Absolute Maximum Ratings Thermal Resistance Typical Performance Curves InSOP-24D Package Drawing InSOP-24D Package Marking Part Ordering Table MSL Table ESD and Latch-Up Table Part Ordering Information